stm32外设-中断详解

0. 写在最前

本栏目笔记都是基于stm32F10x

1. 中断是啥？

什么是中断：CPU在处理某一事件A时，发生的另外某一事件B请求CPU去处理（产生了中断），随后CPU暂时中断当前正在执行的任务，去对事件B进行处理，CPU处理完事件B后再返回之前中断的位置继续执行原来的事件A，这一过程总称为中断。

我们都知道单片机裸机又称为前后台系统，前台系统指的中断服务函数，后台系统指的大循环，即应用程序，我们可以用中断打断这个大循环的运行，然后做一些处理

在这里插入图片描述

2. 中断源

使CPU中断的事件称中断源。中断源向CPU发出中断请求，CPU暂时中断原来执行的事件A转去做事件B。事件B处理完毕后继续返回原先中断的地方（该过程称中断返回，原先中断的地方为断点），继续执行原先的事件。

stm32中断源定义在一个枚举变量中：

typedef enum IRQn
{
/******  Cortex-M3 Processor Exceptions Numbers ***************************************************/NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                             */MemoryManagement_IRQn       = -12,    /*!< 4 Cortex-M3 Memory Management Interrupt              */BusFault_IRQn               = -11,    /*!< 5 Cortex-M3 Bus Fault Interrupt                      */UsageFault_IRQn             = -10,    /*!< 6 Cortex-M3 Usage Fault Interrupt                    */SVCall_IRQn                 = -5,     /*!< 11 Cortex-M3 SV Call Interrupt                       */DebugMonitor_IRQn           = -4,     /*!< 12 Cortex-M3 Debug Monitor Interrupt                 */PendSV_IRQn                 = -2,     /*!< 14 Cortex-M3 Pend SV Interrupt                       */SysTick_IRQn                = -1,     /*!< 15 Cortex-M3 System Tick Interrupt                   *//******  STM32 specific Interrupt Numbers *********************************************************/WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                            */PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detection Interrupt            */TAMPER_IRQn                 = 2,      /*!< Tamper Interrupt                                     */RTC_IRQn                    = 3,      /*!< RTC global Interrupt                                 */FLASH_IRQn                  = 4,      /*!< FLASH global Interrupt                               */RCC_IRQn                    = 5,      /*!< RCC global Interrupt                                 */EXTI0_IRQn                  = 6,      /*!< EXTI Line0 Interrupt                                 */EXTI1_IRQn                  = 7,      /*!< EXTI Line1 Interrupt                                 */EXTI2_IRQn                  = 8,      /*!< EXTI Line2 Interrupt                                 */EXTI3_IRQn                  = 9,      /*!< EXTI Line3 Interrupt                                 */EXTI4_IRQn                  = 10,     /*!< EXTI Line4 Interrupt                                 */DMA1_Channel1_IRQn          = 11,     /*!< DMA1 Channel 1 global Interrupt                      */DMA1_Channel2_IRQn          = 12,     /*!< DMA1 Channel 2 global Interrupt                      */DMA1_Channel3_IRQn          = 13,     /*!< DMA1 Channel 3 global Interrupt                      */DMA1_Channel4_IRQn          = 14,     /*!< DMA1 Channel 4 global Interrupt                      */DMA1_Channel5_IRQn          = 15,     /*!< DMA1 Channel 5 global Interrupt                      */DMA1_Channel6_IRQn          = 16,     /*!< DMA1 Channel 6 global Interrupt                      */DMA1_Channel7_IRQn          = 17,     /*!< DMA1 Channel 7 global Interrupt                      */#ifdef STM32F10X_LDADC1_2_IRQn                 = 18,     /*!< ADC1 and ADC2 global Interrupt                       */USB_HP_CAN1_TX_IRQn         = 19,     /*!< USB Device High Priority or CAN1 TX Interrupts       */USB_LP_CAN1_RX0_IRQn        = 20,     /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */CAN1_RX1_IRQn               = 21,     /*!< CAN1 RX1 Interrupt                                   */CAN1_SCE_IRQn               = 22,     /*!< CAN1 SCE Interrupt                                   */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_IRQn               = 24,     /*!< TIM1 Break Interrupt                                 */TIM1_UP_IRQn                = 25,     /*!< TIM1 Update Interrupt                                */TIM1_TRG_COM_IRQn           = 26,     /*!< TIM1 Trigger and Commutation Interrupt               */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */USBWakeUp_IRQn              = 42      /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */    
#endif /* STM32F10X_LD */  #ifdef STM32F10X_LD_VLADC1_IRQn                   = 18,     /*!< ADC1 global Interrupt                                */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_TIM15_IRQn         = 24,     /*!< TIM1 Break and TIM15 Interrupts                      */TIM1_UP_TIM16_IRQn          = 25,     /*!< TIM1 Update and TIM16 Interrupts                     */TIM1_TRG_COM_TIM17_IRQn     = 26,     /*!< TIM1 Trigger and Commutation and TIM17 Interrupt     */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */CEC_IRQn                    = 42,     /*!< HDMI-CEC Interrupt                                   */TIM6_DAC_IRQn               = 54,     /*!< TIM6 and DAC underrun Interrupt                      */TIM7_IRQn                   = 55      /*!< TIM7 Interrupt                                       */       
#endif /* STM32F10X_LD_VL */#ifdef STM32F10X_MDADC1_2_IRQn                 = 18,     /*!< ADC1 and ADC2 global Interrupt                       */USB_HP_CAN1_TX_IRQn         = 19,     /*!< USB Device High Priority or CAN1 TX Interrupts       */USB_LP_CAN1_RX0_IRQn        = 20,     /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */CAN1_RX1_IRQn               = 21,     /*!< CAN1 RX1 Interrupt                                   */CAN1_SCE_IRQn               = 22,     /*!< CAN1 SCE Interrupt                                   */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_IRQn               = 24,     /*!< TIM1 Break Interrupt                                 */TIM1_UP_IRQn                = 25,     /*!< TIM1 Update Interrupt                                */TIM1_TRG_COM_IRQn           = 26,     /*!< TIM1 Trigger and Commutation Interrupt               */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                 */I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */USBWakeUp_IRQn              = 42      /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */  
#endif /* STM32F10X_MD */  #ifdef STM32F10X_MD_VLADC1_IRQn                   = 18,     /*!< ADC1 global Interrupt                                */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_TIM15_IRQn         = 24,     /*!< TIM1 Break and TIM15 Interrupts                      */TIM1_UP_TIM16_IRQn          = 25,     /*!< TIM1 Update and TIM16 Interrupts                     */TIM1_TRG_COM_TIM17_IRQn     = 26,     /*!< TIM1 Trigger and Commutation and TIM17 Interrupt     */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                 */I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */CEC_IRQn                    = 42,     /*!< HDMI-CEC Interrupt                                   */TIM6_DAC_IRQn               = 54,     /*!< TIM6 and DAC underrun Interrupt                      */TIM7_IRQn                   = 55      /*!< TIM7 Interrupt                                       */       
#endif /* STM32F10X_MD_VL */#ifdef STM32F10X_HDADC1_2_IRQn                 = 18,     /*!< ADC1 and ADC2 global Interrupt                       */USB_HP_CAN1_TX_IRQn         = 19,     /*!< USB Device High Priority or CAN1 TX Interrupts       */USB_LP_CAN1_RX0_IRQn        = 20,     /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */CAN1_RX1_IRQn               = 21,     /*!< CAN1 RX1 Interrupt                                   */CAN1_SCE_IRQn               = 22,     /*!< CAN1 SCE Interrupt                                   */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_IRQn               = 24,     /*!< TIM1 Break Interrupt                                 */TIM1_UP_IRQn                = 25,     /*!< TIM1 Update Interrupt                                */TIM1_TRG_COM_IRQn           = 26,     /*!< TIM1 Trigger and Commutation Interrupt               */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                 */I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */USBWakeUp_IRQn              = 42,     /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */TIM8_BRK_IRQn               = 43,     /*!< TIM8 Break Interrupt                                 */TIM8_UP_IRQn                = 44,     /*!< TIM8 Update Interrupt                                */TIM8_TRG_COM_IRQn           = 45,     /*!< TIM8 Trigger and Commutation Interrupt               */TIM8_CC_IRQn                = 46,     /*!< TIM8 Capture Compare Interrupt                       */ADC3_IRQn                   = 47,     /*!< ADC3 global Interrupt                                */FSMC_IRQn                   = 48,     /*!< FSMC global Interrupt                                */SDIO_IRQn                   = 49,     /*!< SDIO global Interrupt                                */TIM5_IRQn                   = 50,     /*!< TIM5 global Interrupt                                */SPI3_IRQn                   = 51,     /*!< SPI3 global Interrupt                                */UART4_IRQn                  = 52,     /*!< UART4 global Interrupt                               */UART5_IRQn                  = 53,     /*!< UART5 global Interrupt                               */TIM6_IRQn                   = 54,     /*!< TIM6 global Interrupt                                */TIM7_IRQn                   = 55,     /*!< TIM7 global Interrupt                                */DMA2_Channel1_IRQn          = 56,     /*!< DMA2 Channel 1 global Interrupt                      */DMA2_Channel2_IRQn          = 57,     /*!< DMA2 Channel 2 global Interrupt                      */DMA2_Channel3_IRQn          = 58,     /*!< DMA2 Channel 3 global Interrupt                      */DMA2_Channel4_5_IRQn        = 59      /*!< DMA2 Channel 4 and Channel 5 global Interrupt        */
#endif /* STM32F10X_HD */  #ifdef STM32F10X_HD_VLADC1_IRQn                   = 18,     /*!< ADC1 global Interrupt                                */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_TIM15_IRQn         = 24,     /*!< TIM1 Break and TIM15 Interrupts                      */TIM1_UP_TIM16_IRQn          = 25,     /*!< TIM1 Update and TIM16 Interrupts                     */TIM1_TRG_COM_TIM17_IRQn     = 26,     /*!< TIM1 Trigger and Commutation and TIM17 Interrupt     */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                 */I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */CEC_IRQn                    = 42,     /*!< HDMI-CEC Interrupt                                   */TIM12_IRQn                  = 43,     /*!< TIM12 global Interrupt                               */TIM13_IRQn                  = 44,     /*!< TIM13 global Interrupt                               */TIM14_IRQn                  = 45,     /*!< TIM14 global Interrupt                               */TIM5_IRQn                   = 50,     /*!< TIM5 global Interrupt                                */SPI3_IRQn                   = 51,     /*!< SPI3 global Interrupt                                */UART4_IRQn                  = 52,     /*!< UART4 global Interrupt                               */UART5_IRQn                  = 53,     /*!< UART5 global Interrupt                               */  TIM6_DAC_IRQn               = 54,     /*!< TIM6 and DAC underrun Interrupt                      */TIM7_IRQn                   = 55,     /*!< TIM7 Interrupt                                       */  DMA2_Channel1_IRQn          = 56,     /*!< DMA2 Channel 1 global Interrupt                      */DMA2_Channel2_IRQn          = 57,     /*!< DMA2 Channel 2 global Interrupt                      */DMA2_Channel3_IRQn          = 58,     /*!< DMA2 Channel 3 global Interrupt                      */DMA2_Channel4_5_IRQn        = 59,     /*!< DMA2 Channel 4 and Channel 5 global Interrupt        */DMA2_Channel5_IRQn          = 60      /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is mapped at position 60 only if the MISC_REMAP bit in the AFIO_MAPR2 register is set)                      */       
#endif /* STM32F10X_HD_VL */#ifdef STM32F10X_XLADC1_2_IRQn                 = 18,     /*!< ADC1 and ADC2 global Interrupt                       */USB_HP_CAN1_TX_IRQn         = 19,     /*!< USB Device High Priority or CAN1 TX Interrupts       */USB_LP_CAN1_RX0_IRQn        = 20,     /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */CAN1_RX1_IRQn               = 21,     /*!< CAN1 RX1 Interrupt                                   */CAN1_SCE_IRQn               = 22,     /*!< CAN1 SCE Interrupt                                   */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_TIM9_IRQn          = 24,     /*!< TIM1 Break Interrupt and TIM9 global Interrupt       */TIM1_UP_TIM10_IRQn          = 25,     /*!< TIM1 Update Interrupt and TIM10 global Interrupt     */TIM1_TRG_COM_TIM11_IRQn     = 26,     /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                 */I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */USBWakeUp_IRQn              = 42,     /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */TIM8_BRK_TIM12_IRQn         = 43,     /*!< TIM8 Break Interrupt and TIM12 global Interrupt      */TIM8_UP_TIM13_IRQn          = 44,     /*!< TIM8 Update Interrupt and TIM13 global Interrupt     */TIM8_TRG_COM_TIM14_IRQn     = 45,     /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */TIM8_CC_IRQn                = 46,     /*!< TIM8 Capture Compare Interrupt                       */ADC3_IRQn                   = 47,     /*!< ADC3 global Interrupt                                */FSMC_IRQn                   = 48,     /*!< FSMC global Interrupt                                */SDIO_IRQn                   = 49,     /*!< SDIO global Interrupt                                */TIM5_IRQn                   = 50,     /*!< TIM5 global Interrupt                                */SPI3_IRQn                   = 51,     /*!< SPI3 global Interrupt                                */UART4_IRQn                  = 52,     /*!< UART4 global Interrupt                               */UART5_IRQn                  = 53,     /*!< UART5 global Interrupt                               */TIM6_IRQn                   = 54,     /*!< TIM6 global Interrupt                                */TIM7_IRQn                   = 55,     /*!< TIM7 global Interrupt                                */DMA2_Channel1_IRQn          = 56,     /*!< DMA2 Channel 1 global Interrupt                      */DMA2_Channel2_IRQn          = 57,     /*!< DMA2 Channel 2 global Interrupt                      */DMA2_Channel3_IRQn          = 58,     /*!< DMA2 Channel 3 global Interrupt                      */DMA2_Channel4_5_IRQn        = 59      /*!< DMA2 Channel 4 and Channel 5 global Interrupt        */
#endif /* STM32F10X_XL */  #ifdef STM32F10X_CLADC1_2_IRQn                 = 18,     /*!< ADC1 and ADC2 global Interrupt                       */CAN1_TX_IRQn                = 19,     /*!< USB Device High Priority or CAN1 TX Interrupts       */CAN1_RX0_IRQn               = 20,     /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */CAN1_RX1_IRQn               = 21,     /*!< CAN1 RX1 Interrupt                                   */CAN1_SCE_IRQn               = 22,     /*!< CAN1 SCE Interrupt                                   */EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */TIM1_BRK_IRQn               = 24,     /*!< TIM1 Break Interrupt                                 */TIM1_UP_IRQn                = 25,     /*!< TIM1 Update Interrupt                                */TIM1_TRG_COM_IRQn           = 26,     /*!< TIM1 Trigger and Commutation Interrupt               */TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                */I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                 */I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                 */SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                */USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                              */EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */RTCAlarm_IRQn               = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */OTG_FS_WKUP_IRQn            = 42,     /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */TIM5_IRQn                   = 50,     /*!< TIM5 global Interrupt                                */SPI3_IRQn                   = 51,     /*!< SPI3 global Interrupt                                */UART4_IRQn                  = 52,     /*!< UART4 global Interrupt                               */UART5_IRQn                  = 53,     /*!< UART5 global Interrupt                               */TIM6_IRQn                   = 54,     /*!< TIM6 global Interrupt                                */TIM7_IRQn                   = 55,     /*!< TIM7 global Interrupt                                */DMA2_Channel1_IRQn          = 56,     /*!< DMA2 Channel 1 global Interrupt                      */DMA2_Channel2_IRQn          = 57,     /*!< DMA2 Channel 2 global Interrupt                      */DMA2_Channel3_IRQn          = 58,     /*!< DMA2 Channel 3 global Interrupt                      */DMA2_Channel4_IRQn          = 59,     /*!< DMA2 Channel 4 global Interrupt                      */DMA2_Channel5_IRQn          = 60,     /*!< DMA2 Channel 5 global Interrupt                      */ETH_IRQn                    = 61,     /*!< Ethernet global Interrupt                            */ETH_WKUP_IRQn               = 62,     /*!< Ethernet Wakeup through EXTI line Interrupt          */CAN2_TX_IRQn                = 63,     /*!< CAN2 TX Interrupt                                    */CAN2_RX0_IRQn               = 64,     /*!< CAN2 RX0 Interrupt                                   */CAN2_RX1_IRQn               = 65,     /*!< CAN2 RX1 Interrupt                                   */CAN2_SCE_IRQn               = 66,     /*!< CAN2 SCE Interrupt                                   */OTG_FS_IRQn                 = 67      /*!< USB OTG FS global Interrupt                          */
#endif /* STM32F10X_CL */     
} IRQn_Type;

中断源和中断向量表有密切的关系。每个中断源都有一个对应的中断向量，存储在中断向量表中。当某个中断源发出请求时，处理器会根据其类型码在表中查找相应的向量，然后执行相应的服务程序

对于中文手册中的向量表：

在这里插入图片描述

3. NVIC

NVIC 是嵌套向量中断控制器，控制着整个芯片中断相关的功能，它跟内核紧密耦合，是内核里面的一个外设。但是各个芯片厂商在设计芯片的时候会对 Cortex-M3 内核里面的 NVIC 进行裁剪，把不需要的部分去掉，所以说 STM32的 NVIC 是 Cortex-M 3 的 NVIC 的一个子集

在core_cm3.h文件中我们可以找到这么一个结构体：

typedef struct
{__IO uint32_t ISER[8];                      /*!< Offset: 0x000  Interrupt Set Enable Register           */uint32_t RESERVED0[24];                                   __IO uint32_t ICER[8];                      /*!< Offset: 0x080  Interrupt Clear Enable Register         */uint32_t RSERVED1[24];                                    __IO uint32_t ISPR[8];                      /*!< Offset: 0x100  Interrupt Set Pending Register          */uint32_t RESERVED2[24];                                   __IO uint32_t ICPR[8];                      /*!< Offset: 0x180  Interrupt Clear Pending Register        */uint32_t RESERVED3[24];                                   __IO uint32_t IABR[8];                      /*!< Offset: 0x200  Interrupt Active bit Register           */uint32_t RESERVED4[56];                                   __IO uint8_t  IP[240];                      /*!< Offset: 0x300  Interrupt Priority Register (8Bit wide) */uint32_t RESERVED5[644];                                  __O  uint32_t STIR;                         /*!< Offset: 0xE00  Software Trigger Interrupt Register     */
}  NVIC_Type;

在配置中断的时候我们一般只用 ISER、 ICER和IP这三个寄存器，ISER用来使能中断， ICER 用来使能中断，IP 用来设置中断优先级。

[ISER[8]：中断使能寄存器，用来开启或关闭中断源
[ICER[8]：中断清除寄存器，用来清除已经使能的中断源
[ISPR[8]：中断挂起寄存器，用来设置或清除中断挂起标志位
[ICPR[8]：中断清除挂起寄存器，用来清除已经挂起的中断标志位
[IABR[8]：中断激活状态寄存器，用来显示当前哪些中断正在被处理
[IP[240：中断优先级寄存器，用来设置每个中断源的抢占优先级和子优先级
STIR：软件触发中断寄存器，用来通过软件产生一个指定的外设或内核异常

4. 中断优先级

STM32分为抢占式优先级和响应优先级，每个中断源都需要被指定这两种优先级
抢占优先级不同，会涉及到中断嵌套，抢占优先级高的会优先抢占优先级低的，优先得到执行。（注意：优先级数字越小，优先级越高）
抢占优先级相同，不涉及到中断嵌套，响应优先级不同，响应优先级高的先响应。（例如：两个中断同时响应，这里就会先执行响应优先级高的那个中断）（注意：优先级数字越小，优先级越高）
抢占优先级和响应优先级都相同，则比较它们的硬件中断编号，中断编号越小，优先级越高。（硬件中断编号从中断向量表当中查看）

在这里插入图片描述

5. 中断编程

5.1 NVIC 初始化结构体

typedef struct
{uint8_t NVIC_IRQChannel;                    /*!< Specifies the IRQ channel to be enabled or disabled.This parameter can be a value of @ref IRQn_Type (For the complete STM32 Devices IRQ Channels list, pleaserefer to stm32f10x.h file) */uint8_t NVIC_IRQChannelPreemptionPriority;  /*!< Specifies the pre-emption priority for the IRQ channelspecified in NVIC_IRQChannel. This parameter can be a valuebetween 0 and 15 as described in the table @ref NVIC_Priority_Table */uint8_t NVIC_IRQChannelSubPriority;         /*!< Specifies the subpriority level for the IRQ channel specifiedin NVIC_IRQChannel. This parameter can be a valuebetween 0 and 15 as described in the table @ref NVIC_Priority_Table */FunctionalState NVIC_IRQChannelCmd;         /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannelwill be enabled or disabled. This parameter can be set either to ENABLE or DISABLE */   
} NVIC_InitTypeDef;

NVIC_IROChannel :用来设置中断源，不同的中断中断源不一样，且不可写错，即使写错了程序也不会报错，只会导致不响应中断。具体的成员配置可参考 stm32f10x.h 头文件里面的 IRQn_Type结构体定义，这个结构体包含了所有的中断源
NVIC_IRQChannelPreemptionPriority:抢占优先级，具体的值要根据优先级分组来确定，具体参考表格优先级分组真值表优先级分组真值表
NVIC_IRQChannelSubPriority:子优先级，具体的值要根据优先级分组来确定，具体参考表格优先级分组真值表优先级分组真值表
NVIC_IRQChannelCmd: 中断使能（ENABLE）或者失能（DISABLE）。操作的是 NVIC_ISER和 NVIC_ICER 这两个寄存器

5.2 编写中断服务函数

在启动文件 startup_stm32f10x_hd.s 中我们预先为每个中断都写了一个中断服务函数，只是这些中断函数都是为空，为的只是初始化中断向量表。实际的中断服务函数都需要我们重新编写，为了方便管理我们把中断服务函数统一写在 stm32f10x_it.c 这个库文件中。
关于中断服务函数的函数名必须跟启动文件里面预先设置的一样，如果写错，系统就在中断向量表中找不到中断服务函数的入口，直接跳转到启动文件里面预先写好的空函数，并且在里面无限循环，实现不了中断

以下是我从起始文件截取的一些中断服务函数名

__Vectors       DCD     __initial_sp               ; Top of StackDCD     Reset_Handler              ; Reset HandlerDCD     NMI_Handler                ; NMI HandlerDCD     HardFault_Handler          ; Hard Fault HandlerDCD     MemManage_Handler          ; MPU Fault HandlerDCD     BusFault_Handler           ; Bus Fault HandlerDCD     UsageFault_Handler         ; Usage Fault HandlerDCD     0                          ; ReservedDCD     0                          ; ReservedDCD     0                          ; ReservedDCD     0                          ; ReservedDCD     SVC_Handler                ; SVCall HandlerDCD     DebugMon_Handler           ; Debug Monitor HandlerDCD     0                          ; ReservedDCD     PendSV_Handler             ; PendSV HandlerDCD     SysTick_Handler            ; SysTick Handler; External InterruptsDCD     WWDG_IRQHandler            ; Window WatchdogDCD     PVD_IRQHandler             ; PVD through EXTI Line detectDCD     TAMPER_IRQHandler          ; TamperDCD     RTC_IRQHandler             ; RTCDCD     FLASH_IRQHandler           ; FlashDCD     RCC_IRQHandler             ; RCCDCD     EXTI0_IRQHandler           ; EXTI Line 0DCD     EXTI1_IRQHandler           ; EXTI Line 1DCD     EXTI2_IRQHandler           ; EXTI Line 2DCD     EXTI3_IRQHandler           ; EXTI Line 3DCD     EXTI4_IRQHandler           ; EXTI Line 4DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7DCD     ADC1_2_IRQHandler          ; ADC1 & ADC2DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TXDCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1DCD     CAN1_SCE_IRQHandler        ; CAN1 SCEDCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5DCD     TIM1_BRK_IRQHandler        ; TIM1 BreakDCD     TIM1_UP_IRQHandler         ; TIM1 UpdateDCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and CommutationDCD     TIM1_CC_IRQHandler         ; TIM1 Capture CompareDCD     TIM2_IRQHandler            ; TIM2DCD     TIM3_IRQHandler            ; TIM3DCD     TIM4_IRQHandler            ; TIM4DCD     I2C1_EV_IRQHandler         ; I2C1 EventDCD     I2C1_ER_IRQHandler         ; I2C1 ErrorDCD     I2C2_EV_IRQHandler         ; I2C2 EventDCD     I2C2_ER_IRQHandler         ; I2C2 ErrorDCD     SPI1_IRQHandler            ; SPI1DCD     SPI2_IRQHandler            ; SPI2DCD     USART1_IRQHandler          ; USART1DCD     USART2_IRQHandler          ; USART2DCD     USART3_IRQHandler          ; USART3

6. EXTI

6.1 简介

EXTI（External interrupt/event controller）—外部中断/事件控制器，管理了控制器的 20 个中断/事件线。每个中断/事件线都对应有一个边沿检测器，可以实现输入信号的上升沿检测和下降沿的检测。 EXTI 可以实现对每个中断/事件线进行单独配置，可以单独配置为中断或者事件，以及触发事件的属性。

6.2 EXTI 功能框图

EXTI 的功能框图包含了 EXTI 最核心内容，掌握了功能框图，对 EXTI 就有一个整体的把握，在编程时思路就非常清晰。 EXTI 功能框图见图 EXTI 功能框图。在图 EXTI 功能框图可以看到很多在信号线上打一个斜杠并标注“20”字样，这个表示在控制器内部类似的信号线路有 20 个，这与 EXTI 总共有 20 个中断/事件线是吻合的。所以我们只要明白其中一个的原理，那其他 19 个线路原理也就知道了

在这里插入图片描述

首先我们来看图 EXTI 功能框图中红色虚线指示的电路流程。它是一个产生中断的线路，最终信号流入到 NVIC 控制器内。

编号 1 是输入线， EXTI 控制器有 19 个中断/事件输入线，这些输入线可以通过寄存器设置为任意一个 GPIO，也可以是一些外设的事件，这部分内容我们将在后面专门讲解。输入线一般是存在电平变化的信号。
编号 2 是一个边沿检测电路，它会根据上升沿触发选择寄存器 (EXTI_RTSR) 和下降沿触发选择寄存器 (EXTI_FTSR) 对应位的设置来控制信号触发。边沿检测电路以输入线作为信号输入端，如果检测到有边沿跳变就输出有效信号 1 给编号 3 电路，否则输出无效信号 0。而 EXTI_RTSR和EXTI_FTSR 两个寄存器可以控制器需要检测哪些类型的电平跳变过程，可以是只有上升沿触发、只有下降沿触发或者上升沿和下降沿都触发。
编号 3 电路实际就是一个或门电路，它一个输入来自编号 2 电路，另外一个输入来自软件中断事件寄存器 (EXTI_SWIER)。 EXTI_SWIER 允许我们通过程序控制就可以启动中断/事件线，这在某些地方非常有用。我们知道或门的作用就是有 1 就为 1，所以这两个输入随便一个有有效信号 1就可以输出 1 给编号 4 和编号 6 电路。
编号 4 电路是一个与门电路，它一个输入是编号 3 电路，另外一个输入来自中断屏蔽寄存器(EXTI_IMR)。与门电路要求输入都为 1 才输出 1，导致的结果是如果 EXTI_IMR 设置为 0 时，那不管编号 3 电路的输出信号是 1 还是 0，最终编号 4 电路输出的信号都为 0；如果 EXTI_IMR设置为 1 时，最终编号 4 电路输出的信号才由编号 3 电路的输出信号决定，这样我们可以简单的控制 EXTI_IMR 来实现是否产生中断的目的。编号 4 电路输出的信号会被保存到挂起寄存器(EXTI_PR) 内，如果确定编号 4 电路输出为 1 就会把 EXTI_PR 对应位置 1。
编号 5 是将 EXTI_PR 寄存器内容输出到 NVIC 内，从而实现系统中断事件控制。接下来我们来看看绿色虚线指示的电路流程。它是一个产生事件的线路，最终输出一个脉冲信号
产生事件线路是在编号 3 电路之后与中断线路有所不同，之前电路都是共用的。编号 6 电路是一个与门，它一个输入来自编号 3 电路，另外一个输入来自事件屏蔽寄存器 (EXTI_EMR)。如果EXTI_EMR 设置为 0 时，那不管编号 3 电路的输出信号是 1 还是 0，最终编号 6 电路输出的信号都为 0；如果 EXTI_EMR 设置为 1 时，最终编号 6 电路输出的信号才由编号 3 电路的输出信号决定，这样我们可以简单的控制 EXTI_EMR 来实现是否产生事件的目的。
编号 7 是一个脉冲发生器电路，当它的输入端，即编号 6 电路的输出端，是一个有效信号 1 时就会产生一个脉冲；如果输入端是无效信号就不会输出脉冲。
编号 8 是一个脉冲信号，就是产生事件的线路最终的产物，这个脉冲信号可以给其他外设电路使用，比如定时器 TIM、模拟数字转换器 ADC 等等，这样的脉冲信号一般用来触发 TIM 或者 ADC开始转换。
产生中断线路目的是把输入信号输入到 NVIC，进一步会运行中断服务函数，实现功能，这样是软件级的。而产生事件线路目的就是传输一个脉冲信号给其他外设使用，并且是电路级别的信号传输，属于硬件级的。
另外， EXTI 是在 APB2 总线上的，在编程时候需要注意到这点

6.3 中断/事件线

EXTI 有 20 个中断/事件线，每个 GPIO 都可以被设置为输入线，占用 EXTI0 至 EXTI15，还有另
外七根用于特定的外设事件，见表 EXTI 中断事件线。4 根特定外设中断/事件线由外设触发，具体用法参考《STM32F10X-中文参考手册》中对外设的具体说明。

在这里插入图片描述

6.4 EXTI 初始化结构体详解

标准库函数对每个外设都建立了一个初始化结构体，比如 EXTI_InitTypeDef，结构体成员用于设置外设工作参数，并由外设初始化配置函数，比如 EXTI_Init() 调用，这些设定参数将会设置外设相应的寄存器，达到配置外设工作环境的目的。初始化结构体和初始化库函数配合使用是标准库精髓所在，理解了初始化结构体每个成员意义基本上就可以对该外设运用自如了。初始化结构体定义在 stm32f4xx_exti.h 文件中，初始化库函数定义在 stm32f4xx_exti.c 文件中，编程时我们可以结合这两个文件内注释使用。

typedef struct
{uint32_t EXTI_Line;              // // 中断/事件线EXTIMode_TypeDef EXTI_Mode;       // EXTI 模式EXTITrigger_TypeDef EXTI_Trigger; // 触发类型FunctionalState EXTI_LineCmd;     // EXTI 使能
}EXTI_InitTypeDef;

EXTI_Line： EXTI 中断/事件线选择，可选 EXTI0 至 EXTI19，可参考表 EXTI 中断 _ 事件线
选择。
EXTI_Mode： EXTI 模式选择，可选为产生中断 (EXTI_Mode_Interrupt) 或者产生事件
(EXTI_Mode_Event)。

EXTI_Trigger： EXTI 边沿触发事件，可选上升沿触发 (EXTI_Trigger_Rising)、下降沿触发 (
EXTI_Trigger_Falling) 或者上升沿和下降沿都触发 ( EXTI_Trigger_Rising_Falling)。

EXTI_LineCmd：控制是否使能 EXTI 线，可选使能 EXTI 线 (ENABLE) 或禁用 (DISABLE)。

6.5 EXTI中断编程

6.5.1 初始化用来产生中断的 GPIO

RCC_APB2PeriphClockCmd(KEY1_GPIO_CLK,ENABLE);
GPIO_InitStruct.GPIO_Pin = KEY1_G_GPIO_PIN;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
// 将结构体的内容写入init函数中
GPIO_Init(KEY1_G_GPIO_PORT,&GPIO_InitStruct);

6.5.2 初始化 EXTI

// 初始化EXTI
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE);
GPIO_EXTILineConfig(GPIO_PortSourceGPIOA, GPIO_PinSource0);// 设置结构体模式
EXTI_InitStruct.EXTI_Line = EXTI_Line0;
EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising;
EXTI_InitStruct.EXTI_LineCmd = ENABLE;// 将结构体的内容写入init函数中
EXTI_Init(&EXTI_InitStruct);

6.5.3 配置 NVIC

void EXTI_NVIC_Config_KEY1(void)
{NVIC_InitTypeDef NVIC_InitStruct;NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);NVIC_InitStruct.NVIC_IRQChannel = EXTI0_IRQn;NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;NVIC_InitStruct.NVIC_IRQChannelSubPriority = 1;NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;NVIC_Init(&NVIC_InitStruct);
}