http://blog.sina.com.cn/s/blog_57dff12f0100d8do.html
typedef struct _UNICODE_STRING
{
USHORT Length;//长度
USHORT MaximumLength;//最大长度
PWSTR Buffer;//缓存指针
}UNICODE_STRING,*PUNICODE_STRING;
typedef struct _OBJECT_ATTRIBUTES
{
ULONG Length; //长度 18h
HANDLE RootDirectory; // 00000000
PUNICODE_STRING ObjectName; //指向对象名的指针
ULONG Attributes; //对象属性00000040h
PVOID SecurityDescriptor; // Points to type SECURITY_DESCRIPTOR，0
PVOID SecurityQualityOfService; // Points to type SECURITY_QUALITY_OF_SERVICE，0
} OBJECT_ATTRIBUTES;
typedef OBJECT_ATTRIBUTES *POBJECT_ATTRIBUTES;
typedef DWORD (__stdcall *ZWOS )( PHANDLE,ACCESS_MASK,POBJECT_ATTRIBUTES);
typedef DWORD (__stdcall *ZWMV )( HANDLE,HANDLE,PVOID,ULONG,ULONG,PLARGE_INTEGER,PSIZE_T,DWORD,ULONG,ULONG);
typedef DWORD (__stdcall *ZWUMV )( HANDLE,PVOID);
UINT FindAwardBios(BYTE** ppBiosAddr)
{
BYTE* pBiosAddr = * ppBiosAddr + 0xEC71;
BYTE szBiosData[128];
CopyMemory(szBiosData, pBiosAddr, 127);
szBiosData[127] = 0;
int iLen = lstrlen((char*)szBiosData);
if (iLen > 0 && iLen < 128)
{
//AWard: 07/08/2002-i845G-ITE8712-JF69VD0CC-00
//Phoenix-Award: 03/12/2002-sis645-p4s333
if (szBiosData[2] == '/' && szBiosData[5] == '/')
{
BYTE *p = szBiosData;
while (*p)
{
if (*p < ' ' || *p >= 127)
break;
++p;
}
if (*p == 0)
{
*ppBiosAddr = pBiosAddr;
return ( UINT )iLen;
}
}
}
return 0;
}
UINT FindAmiBios(BYTE **ppBiosAddr)
{
BYTE *pBiosAddr = *ppBiosAddr + 0xF478;
BYTE szBiosData[128];
CopyMemory(szBiosData, pBiosAddr, 127);
szBiosData[127] = 0;
int iLen = lstrlen((char*)szBiosData);
if (iLen > 0 && iLen < 128)
{
// Example: "AMI: 51-2300-000000-00101111-030199-"
if (szBiosData[2] == '-' && szBiosData[7] == '-')
{
BYTE *p = szBiosData;
while (*p)
{
if (*p < ' ' || *p >= 127)
break;
++p;
}
if (*p == 0)
{
*ppBiosAddr = pBiosAddr;
return ( UINT )iLen;
}
}
}
return 0;
}
UINT FindPhoenixBios(BYTE **ppBiosAddr)
{
UINT uOffset[3] = {0x6577, 0x7196, 0x7550};
for (UINT i = 0; i < 3; ++i)
{
BYTE *pBiosAddr = *ppBiosAddr + uOffset[i];
BYTE szBiosData[128];
CopyMemory(szBiosData, pBiosAddr, 127);
szBiosData[127] = 0;
int iLen = lstrlen((char*) szBiosData);
if (iLen > 0 && iLen < 128)
{
// Example: Phoenix "NITELT0.86B.0044.P11.9910111055"
if (szBiosData[7] == '.' && szBiosData[11] == '.')
{
BYTE *p = szBiosData;
while (*p)
{
if (*p < ' ' || *p >= 127)
break;
++ p;
}
if (*p == 0)
{
*ppBiosAddr = pBiosAddr;
return (UINT)iLen;
}
}
}
}
return 0;
}
// 获取 BIOS 信息
// 结果保存在当前目录下的 bios_seq.txt 文件下
void GetBiosInfo()
{
SIZE_T ssize;
LARGE_INTEGER so;
so.LowPart = 0x000f0000;
so.HighPart = 0x00000000;
ssize = 0xffff;
wchar_t strPH[30] = L"//device//physicalmemory";
DWORD ba = 0;
UNICODE_STRING struniph;
struniph.Buffer = strPH;
struniph.Length = 0x2c;
struniph.MaximumLength = 0x2e;
OBJECT_ATTRIBUTES obj_ar;
obj_ar.Attributes = 64;
obj_ar.Length = 24;
obj_ar.ObjectName = &struniph;
obj_ar.RootDirectory = 0;
obj_ar.SecurityDescriptor = 0;
obj_ar.SecurityQualityOfService = 0;
HMODULE hinstLib = LoadLibrary("ntdll.dll");
ZWOS ZWopenS = (ZWOS) GetProcAddress(hinstLib,"ZwOpenSection");
ZWMV ZWmapV = (ZWMV) GetProcAddress(hinstLib,"ZwMapViewOfSection");
ZWUMV ZWunmapV = (ZWUMV) GetProcAddress(hinstLib,"ZwUnmapViewOfSection");
//调用函数，对物理内存进行映射
HANDLE hSection;
//执行后会在当前进程的空间开辟一段64k的空间，并把f000:0000到f000:ffff处的内容映射到这里
//映射的基址由ba返回,如果映射不再有用,应该用ZwUnmapViewOfSection断开映射
if (0 == ZWopenS(&hSection, 4, &obj_ar) && 0 == ZWmapV((HANDLE) hSection, (HANDLE) 0xFFFFFFFF, &ba, 0, 0xFFFF, &so,&ssize, 1, 0, 2))
{
BYTE* pBiosSerial = (BYTE*)ba;
UINT uBiosSerialLen = FindAwardBios(&pBiosSerial);
if (uBiosSerialLen == 0U)
{
uBiosSerialLen = FindAmiBios(&pBiosSerial);
if (uBiosSerialLen == 0U)
uBiosSerialLen = FindPhoenixBios(&pBiosSerial);
}
// 把 BIOS 信息传出去
if (uBiosSerialLen != 0U)
{
// 以写追加的方式打开保存结果的文件
FILE *pf = fopen("./bios_seq.txt", "a+");
// 增加断言，确认文件打开成功
assert(NULL != pf);
if (NULL != pf)
{
// 若文件成功打开，则把 BIOS 信息写入文件
fprintf(pf, "bios sequence is %s/n", pBiosSerial);
// 关闭文件句柄
fclose(pf);
}
memcpy(pBios, pBiosSerial, nLen);
}
ZWunmapV((HANDLE)0xFFFFFFFF, (void*) ba);
}
}
http://topic.csdn.net/t/20040716/15/3181620.html
在计算机系统中，对CMOS中数据的读写是通过两个I/O端口来实现的，其中，端口70H是一个字节的只写端口，
用它来设置CMOS中的数据地址；而端口71H是用来读写端口70H设置的CMOS地址中的数据单元字节内容。
CMOS数据保存在地址为00-7F的共128个字节中。在CMOS的128个字节单元中，00H-0FH字节单元中的数据随机性
太强，不易作为密钥。1BH～2DH，34H～3FH，40H～7FH是CMOS的保留单元。不同的BIOS版本对此保留单元设置
不一样。2EH、2FH单元中存放的是10H～2DH单元中各字节的校验和。系统每次引导时要读取CMOS信息，
同时还要检查10H～2DH单元中的各字节的校验和是否与2EH、2FH单元中的数据相同，不同则提示CMOS中数据
有错。CMOS的10H～2DH单元中内容涉及到软盘、硬盘、内存、显示卡等最基本的硬件配置。
CMOS内容对照
地址 内容 地址 内容 地址 内容 地址 内容
00h Time - Seconds 20h Reserved 40h Extended CMOS 60h User Password
01h Alarm - Seconds 21h Reserved 41h Extended CMOS 61h User Password
02h Time - Minutes 22h Reserved 42h Extended CMOS 62h Extended CMOS
03h Alarm - Minutes 23h Reserved 43h Extended CMOS 63h Extended CMOS
04h Time - Hours 24h Reserved 44h Extended CMOS 64h Extended CMOS
05h Alarm - Hours 25h Reserved 45h Extended CMOS 65h Extended CMOS
06h Date - Day of the week 26h Reserved 46h Extended CMOS 66h Extended CMOS
07h Date - Day 27h Reserved 47h Extended CMOS 67h Extended CMOS
08h Date - Month 28h Reserved 48h Extended CMOS 68h Extended CMOS
09h Date - Year 29h Reserved 49h Extended CMOS 69h Extended CMOS
0Ah Status Register A 2Ah Reserved 4Ah Extended CMOS 6Ah Extended CMOS
0Bh Status Register B 2Bh Reserved 4Bh Extended CMOS 6Bh Extended CMOS
0Ch Status Register C 2Ch Reserved 4Ch Extended CMOS 6Ch Extended CMOS
0Dh Status Register D 2Dh Reserved 4Dh Extended CMOS 6Dh Extended CMOS
0Eh Diagnostic Status 2Eh CMOS Checksum (high byte) 4Eh Extended CMOS 6Eh Extended CMOS
0Fh Shutdown Status 2Fh CMOS Checksum (low byte) 4Fh Extended CMOS 6Fh Extended CMOS
10h A; 30h Extended Memory (high byte) 50h Extended CMOS 70h Extended CMOS
11h Reserved 31h Extended Memory (low byte) 51h Extended CMOS 71h Extended CMOS
12h 0 32h Date - Century 52h Extended CMOS 72h Extended CMOS
13h Reserved 33h Power On Status 53h Extended CMOS 73h Extended CMOS
14h Equipment Installed 34h Reserved 54h Extended CMOS 74h Extended CMOS
15h Base Memory (high byte) 35h Reserved 55h Extended CMOS 75h Extended CMOS
16h Base memory (low byte) 36h Reserved 56h Extended CMOS 76h Extended CMOS
17h Extended Memory (high byte) 37h Reserved 57h Extended CMOS 77h Extended CMOS
18h Extended Memory (low byte) 38h Reserved 58h Extended CMOS 78h Extended CMOS
19h 0 (C:) Hard Disk Type 39h Reserved 59h Extended CMOS 79h Extended CMOS
1Ah 1 (D:) Hard Disk Type 3Ah Reserved 5Ah Extended CMOS 7Ah Extended CMOS
1Bh Reserved 3Bh Reserved 5Bh Extended CMOS 7Bh Extended CMOS
1Ch Supervisor Password 3Ch Reserved 5Ch Extended CMOS 7Ch Extended CMOS
1Dh Supervisor Password 3Dh Reserved 5Dh Extended CMOS 7Dh Extended CMOS
1Eh Reserved 3Eh Reserved 5Eh Extended CMOS 7Eh Extended CMOS
1Fh Reserved 3Fh Reserved 5Fh Extended CMOS 7Fh Extended CMOS
结合楼上的
如何在windows程序中读取bios内容（物理内存内容）
火翼[CCG]
今天和夜月兄讨论了一下在windows nt/2000/xp下如何读取bios信息，现在把
结果向大家汇报一下。
大家都知道，windows接管了对物理内存的直接存取，而bios信息存在物理内存
的f000:0000处，关键就是如何读取物理内存。
查阅了msdn的文章后，发现以下有几个函数和物理内存访问有关：
NTSTATUS ZwOpenSection(OUT PHANDLE SectionHandle, IN ACCESS_MASK DesiredAccess,IN POBJECT_ATTRIBUTES ObjectAttributes);
NTSTATUS ZwMapViewOfSection(IN HANDLE SectionHandle,
IN HANDLE ProcessHandle,
IN OUT PVOID *BaseAddress,
IN ULONG ZeroBits,
IN ULONG CommitSize,
IN OUT PLARGE_INTEGER SectionOffset OPTIONAL,
IN OUT PSIZE_T ViewSize,
IN SECTION_INHERIT InheritDisposition,
IN ULONG AllocationType,
IN ULONG Protect
);
NTSTATUS ZwUnmapViewOfSection(IN HANDLE ProcessHandle,IN PVOID BaseAddress);
用到的结构定义如下
typedef struct _UNICODE_STRING {
USHORT Length;//长度
USHORT MaximumLength;//最大长度
PWSTR Buffer;//缓存指针，访问物理内存时，此处指向UNICODE字符串 "/device/physicalmemory "
} UNICODE_STRING,*PUNICODE_STRING;
typedef struct _OBJECT_ATTRIBUTES {
ULONG Length;//长度 18h
HANDLE RootDirectory;// 00000000
PUNICODE_STRING ObjectName;//指向对象名的指针
ULONG Attributes;//对象属性00000040h
PVOID SecurityDescriptor; // Points to type SECURITY_DESCRIPTOR，0
PVOID SecurityQualityOfService; // Points to type SECURITY_QUALITY_OF_SERVICE，0
} OBJECT_ATTRIBUTES;
typedef OBJECT_ATTRIBUTES *POBJECT_ATTRIBUTES;
函数说明
第一个函数ZwOpenSection用来打开section，第一个参数是指向HANDLE变量的指针，第二个是访问参数，第三个是指向OBJECT_ATTRIBUTES的指针
第二个函数ZwMapViewOfSection用来建立物理内存和当前进程的一段物理内存的联系，参数很多，一会在例程里再详细解释
第三个函数ZwUnmapViewOfSection用来断开物理内存和当前进程中的映射断开联系，第一个参数是进程句柄，必须掉用第二个函数时一样，第二
个是当前进程中映射的基址，由ZwMapViewOfSection返回
这三个函数都在ntdll.dll中，msdn里的帮助说这几个函数用在驱动编制上。
例程如下
//结构定义
typedef struct _UNICODE_STRING {
USHORT Length;//长度
USHORT MaximumLength;//最大长度
PWSTR Buffer;//缓存指针
} UNICODE_STRING,*PUNICODE_STRING;
typedef struct _OBJECT_ATTRIBUTES {
ULONG Length;//长度 18h
HANDLE RootDirectory;// 00000000
PUNICODE_STRING ObjectName;//指向对象名的指针
ULONG Attributes;//对象属性00000040h
PVOID SecurityDescriptor; // Points to type SECURITY_DESCRIPTOR，0
PVOID SecurityQualityOfService; // Points to type SECURITY_QUALITY_OF_SERVICE，0
} OBJECT_ATTRIBUTES;
typedef OBJECT_ATTRIBUTES *POBJECT_ATTRIBUTES;
//函数指针变量类型生命
typedef DWORD (__stdcall *ZWOS)(PHANDLE,ACCESS_MASK,POBJECT_ATTRIBUTES);
typedef DWORD (__stdcall *ZWMV)(HANDLE,HANDLE,PVOID,ULONG,ULONG,PLARGE_INTEGER,PSIZE_T,DWORD,ULONG,ULONG);
typedef DWORD (__stdcall *ZWUMV)(HANDLE,PVOID);
//以上在程序开始定义全局变量处定义
//以下在程序的主函数里
//变量声明
UNICODE_STRING struniph;
OBJECT_ATTRIBUTES obj_ar;
ZWOS ZWopenS;
ZWMV ZWmapV;
ZWUMV ZWunmapV;
HANDLE hSection;
DWORD ba;
LARGE_INTEGER so;
SIZE_T ssize;
so.LowPart=0x000f0000;//物理内存的基址，就是f000:0000
so.HighPart=0x00000000;
ssize=0xffff;
wchar_t strPH[30]=L "//device//physicalmemory ";
//变量初始化
ba=0;//联系后的基址将在这里返回
struniph.Buffer=strPH;
struniph.Length=0x2c;//注意大小是按字节算
struniph.MaximumLength =0x2e;//也是字节
obj_ar.Attributes =64;//属性
obj_ar.Length =24;//OBJECT_ATTRIBUTES类型的长度
obj_ar.ObjectName=&struniph;//指向对象的指针
obj_ar.RootDirectory=0;
obj_ar.SecurityDescriptor=0;
obj_ar.SecurityQualityOfService =0;
//读入ntdll.dll,得到函数地址
hinstLib = LoadLibrary( "ntdll.dll ");
ZWopenS=(ZWOS)GetProcAddress(hinstLib, "ZwOpenSection ");
ZWmapV=(ZWMV)GetProcAddress(hinstLib, "ZwMapViewOfSection ");
ZWunmapV=(ZWUMV)GetProcAddress(hinstLib, "ZwUnmapViewOfSection ");
//调用函数，对物理内存进行映射
ZWopenS(&hSection,4,&obj_ar);
ZWmapV(
(HANDLE)hSection, //打开Section时得到的句柄
(HANDLE)0xffffffff, //将要映射进程的句柄，
&ba, //映射的基址
0, //没怎么看明白,设为0就好了
0xffff, //分配的大小
&so, //物理内存的地址
&ssize, //指向读取内存块大小的指针
1, //子进程的可继承性设定
0, //分配类型
2 //保护类型
);
//执行后会在当前进程的空间开辟一段64k的空间，并把f000:0000到f000:ffff处的内容映射到这里
//映射的基址由ba返回,如果映射不在有用,应该用ZwUnmapViewOfSection断开映射
http://bochs.sourceforge.net/techspec/CMOS-reference.txt
from http://moon.inf.uji.es/docs/interr/CMOS/CMOS.HTM Wed May 2 21:50:32 EDT 2001 CMOS ------------------------------------------------------------------------ CMOS Memory Map Release 50 Last change 5/12/96 Compiled from multiple sources by Padgett Peterson Corrections/additions/comments to: padgett@tccslr.dnet.mmc.com No guarantees of any kind. Copyrights/Trademarks belong to whoever they may belong to. Found: Algorithm used by IBM in calculating CRC checksums for PS/2 (see bytes 32h-33h). Complex (recursive part is 12 lines of assembly) and not yet validated for every model. --------!------------------------------------ Background The CMOS (complementary metal oxide semiconductor) memory is actually a 64 or 128 byte battery-backed RAM memory module that is a part of the system clock chip. Some IBM PS/2 models have the capability for a 2k (2048 byte) CMOS ROM Extension. First used with clock-calender cards for the IBM PC-XT, when the PC/AT (Advanced Technology) was introduced in 1985, the Motorola MC146818 became a part of the motherboard. Since the clock only uses fourteen of the RAM bytes, the rest are available for storing system configuration data. Interestingly, the original IBM-PC/AT (Advanced Technology) standard for the region 10h-3Fh is nearly universal with one notable exception: The IBM PS/2 systems deviate considerably (Note: AMSTRAD 8086 machines were among the first to actively use the CMOS memory available and since they *predate* the AT, do not follow the AT standard). This is just another example of how IBM created a standard, lost control of it, tried to replace it, failed and lost market share in the process. Originally, the IBM PC/AT only made use of a small portion of CMOS memory and was defined in the IBM PC/AT Technical Reference Manual, specifically bytes 10h, 12h, 14h-18h, 2Eh-33h. The balance was left undefined but was quickly appropriated by various BIOS manufacturers for such user-selectable options such as wait states, clock speeds, initial boot drive selection, and password storage. Later, as CMOS memory requirements grew, newer clock chips with 128 bytes of RAM came into use. However the fact remains that once the AT standard was established, only IBM has tried to change the definitions of that first description. Accessing the CMOS The CMOS memory exists outside of the normal address space and cannot contain directly executable code. It is reachable through IN and OUT commands at port number 70h (112d) and 71h (113d). To read a CMOS byte, an OUT to port 70h is executed with the address of the byte to be read and an IN from port 71h will then retrieve the requested information. The following BASIC fragment will read 128 CMOS bytes and print them to the screen in 8 rows of 16 values. CMOS RAM space has an upper limit of 128 bytes because of the structure of port 70: only bits 0-6 are used for addressing, bit 7 is used to enable (0) or disable (1) Non-Maskable Interrupts (NMI) and explains why IBM uses 80h OR to read/write data & follows with a "throw-away" call. Note that if the CMOS only has 64 bytes available, addressing will generally wrap and addresses from 40h-7Fh will mirror 00h-3Fh. Output will be hexadecimal. 10 CLS 20 FOR i = 0 TO &H7F 30 OUT &H70, i 40 PRINT USING "/ /"; HEX$(INP(&H71)); 50 NEXT i 60 PRINT " " Note: where not otherwise noted, all data points are expressed as BYTES these are eight bit values and are read from MSB to LSB e.g. 0000 0000 0101 1010 binary would be written as 5Ah 7654 3210 where only some bits are used this is represented with Xs e.g bits 5-3 would be shown as 00xx x000 Note: the entries for AMI WinBIOS also apply to AMIBIOS with core dates of 12/15/95 or later --------!------------------------------------ Organization of CMOS Memory - Clock 00h-0Eh is defined by the clock hardware and all must follow it. Other manufacturers generally follow the same format as specified for the region 10h - 2Fh. Some also follow the IBM format for 30h-33h but not all (Zenith in particular is different). The first fourteen bytes are dedicated to the MC146818 chip clock functions and consist of ten read/write data registers and four status registers, two of which are read/write and two of which are read only. The format of the ten clock data registers (bytes 00h-09h) is: ----------R00-------------------------------- CMOS 00h - RTC - SECONDS Desc: (BCD 00-59, Hex 00-3B) Note: Bit 7 is read only SeeAlso: CMOS 01h,CMOS 02h,CMOS 04h ----------R01-------------------------------- CMOS 01h - RTC - SECOND ALARM Desc: (BCD 00-59, Hex 00-3B; "don't care" if C0-FF) SeeAlso: CMOS 00h,CMOS 03h,CMOS 05h ----------R02-------------------------------- CMOS 02h - RTC - MINUTES Desc: (BCD 00-59, Hex 00-3B) SeeAlso: CMOS 00h,CMOS 03h,CMOS 04h ----------R03-------------------------------- CMOS 03h - RTC - MINUTE ALARM Desc: (BCD 00-59, Hex 00-3B; "don't care" if C0-FF)) SeeAlso: CMOS 00h,CMOS 02h,CMOS 05h ----------R04-------------------------------- CMOS 04h - RTC - HOURS Desc: (BCD 00-23, Hex 00-17 if 24 hr mode) (BCD 01-12, Hex 01-0C if 12 hr am) (BCD 81-92. Hex 81-8C if 12 hr pm) SeeAlso: CMOS 00h,CMOS 02h,CMOS 05h ----------R05-------------------------------- CMOS 05h - RTC - HOUR ALARM Desc: (same as hours; "don't care" if C0-FF)) SeeAlso: CMOS 01h,CMOS 03h,CMOS 04h ----------R06-------------------------------- CMOS 06h - RTC - DAY OF WEEK Desc: (01-07 Sunday=1) SeeAlso: CMOS 07h,CMOS 08h,CMOS 09h ----------R07-------------------------------- CMOS 07h - RTC - DATE OF MONTH Desc: (BCD 01-31, Hex 01-1F) SeeAlso: CMOS 06h,CMOS 08h,CMOS 09h ----------R08-------------------------------- CMOS 08h - RTC - MONTH Desc: (BCD 01-12, Hex 01-0C) SeeAlso: CMOS 06h,CMOS 07h,CMOS 09h ----------R09-------------------------------- CMOS 09h - RTC - YEAR Desc: (BCD 00-99, Hex 00-63) Notes: BCD/Hex selection depends on Bit 2 of register B (0Bh) 12/24 Hr selection depends on Bit 1 of register B (0Bh) Alarm will trigger when contents of all three Alarm byte registers match their companions. SeeAlso: CMOS 06h,CMOS 07h,CMOS 08h The following is the on-chip status register information. ----------R0A-------------------------------- CMOS 0Ah - RTC - STATUS REGISTER A (read/write) (usu 26h) Bitfields for Real-Time Clock status register A: Bit(s) Description (Table C001) 7 =1 time update cycle in progress, data ouputs undefined (bit 7 is read only) 6-4 22 stage divider 010 = 32768 Hz time base (default) 3-0 rate selection bits for interrupt 0000 none 0011 122 microseconds (minimum) 1111 500 milliseconds 0110 976.562 microseconds (default 1024 Hz) SeeAlso: #C002,#C003,#C004 ----------R0B-------------------------------- CMOS 0Bh - RTC - STATUS REGISTER B (read/write) Bitfields for Real-Time Clock status register B: Bit(s) Description (Table C002) 7 enable cycle update 6 enable periodic interrupt 5 enable alarm interrupt 4 enable update-ended interrupt 3 enable square wave output 2 Data Mode - 0: BCD, 1: Binary 1 24/12 hour selection - 1 enables 24 hour mode 0 Daylight Savings Enable - 1 enables SeeAlso: #C001,#C003,#C004 ----------R0C-------------------------------- CMOS 0Ch - RTC - STATUS REGISTER C (Read only) Bitfields for Real-Time Clock status register C: Bit(s) Description (Table C003) 7 Interrupt request flag =1 when any or all of bits 6-4 are 1 and appropriate enables (Register B) are set to 1. Generates IRQ 8 when triggered. 6 Periodic Interrupt flag 5 Alarm Interrupt flag 4 Update-Ended Interrupt Flag 3-0 unused??? SeeAlso: #C001,#C002,#C004 ----------R0D-------------------------------- CMOS 0Dh - RTC - STATUS REGISTER D (read only) Bitfields for Real-Time Clock status register D: Bit(s) Description (Table C004) 7 Valid RAM - 1 indicates batery power good, 0 if dead or disconnected. 6-0 unused??? (0) --------!------------------------------------ Organization of CMOS Memory - non-Clock The last two bytes in the first hexadecimal decade (hexade ?) were not specified in the PC/AT but may have the following use on some systems: ----------R0E-------------------------------- CMOS 0Eh - IBM PS/2 - DIAGNOSTIC STATUS BYTE Bitfields for IBM PS/2 diagnostic status byte: Bit(s) Description (Table C005) 7 indicates clock has lost power 6 incorrect checksum 5 equipment configuration is incorrect (power-on check requires that atleast one floppy be installed) 4 error in memory size 3 controller or disk drive failed initialization 2 time is invalid 1 installed adaptors do not match configuration 0 time-out while reading adaptor ID ----------R0E13------------------------------ CMOS 0Eh-13h - AMSTRAD - TIME AND DATE MACHINE LAST USED ----------R0F-------------------------------- CMOS 0Fh - IBM - RESET CODE (IBM PS/2 "Shutdown Status Byte") (Table C006) Values for Reset Code / Shutdown Status Byte: 00h-03h perform power-on reset 00h software reset or unexpected reset 01h reset after memory size check in real/virtual mode (or: chip set initialization for real mode reentry) 02h reset after successful memory test in real/virtual mode 03h reset after failed memory test in real/virtual mode 04h INT 19h reboot 05h flush keyboard (issue EOI) and jump via 40h:0067h 06h reset (after successful test in virtual mode) (or: jump via 40h:0067h without EOI) 07h reset (after failed test in virtual mode) 08h used by POST during protected-mode RAM test (return to POST) 09h used for INT 15/87h (block move) support 0Ah resume execution by jump via 40h:0067h 0Bh resume execution via IRET via 40h:0067h 0Ch resume execution via RETF via 40h:0067h 0Dh-FFh perform power-on reset --------!------------------------------------ The second group of values extends from address 10h to 2Dh. The word at 2Eh-2Fh is a byte-wise summation of the values in these bytes. Most BIOSes will generate a CMOS Checksum error if this value is invalid however many programs ignore the checksum and report the apparent value. The current version of MSD reports my XT as having 20+ MB of extended memory. Where a definiton appears universal, no identification is made. Where the definition is thought to be specific to a manufacturer/model (AMI, AMSTRAD, IBM AT, IBM PS/2) the identification is enclosed in parens. The AMSTAD definitions appear to relate to 8088/8086 (PC and PC/XT class) mchines only. AT class machines appear to adhere to IBM PC/AT fornat. ----------R10-------------------------------- CMOS 10h - IBM - FLOPPY DRIVE TYPE Note: a PC having a 5 1/4 1.2 Mb A: drive and a 1.44 Mb B: drive will have a value of 24h in byte 10h. With a single 1.44 drive: 40h. Bitfields for floppy drives A/B types: Bit(s) Description (Table C007) 7-4 first floppy disk drive type (see #C008) 3-0 second floppy disk drive type (see #C008) (Table C008) Values for floppy drive type: 00h no drive 01h 360 KB 5.25 Drive 02h 1.2 MB 5.25 Drive - note: not listed in PS/2 technical manual 03h 720 KB 3.5 Drive 04h 1.44 MB 3.5 Drive 05h 2.88 MB 3.5 drive 06h-0Fh unused SeeAlso: #C007 ----------R11-------------------------------- CMOS 11h - IBM PS/2 - FIRST FIXED DISK DRIVE TYPE BYTE (00-FFh) Note: if IBM ESDI or SCSI drive controller is used, CMOS drive type will be zero (00 - no drive) and INT 13h will be directed to controller ROM. ----------R11-------------------------------- CMOS 11h - older AMI Hi-Flex BIOS - KEYBOARD TYPEMATIC DATA Bitfields for AMI Hi-Flex BIOS keyboard typematic data: Bit(s) Description (Table C009) 7 enable Typematic 6-5 Typematic Delay (wait before begin repeating) 00b 250 ms 01b 500 ms 10b 750 ms 11b 100 ms 4-0 Typematic Rate (char/sec) 00000b - 30.0 01000b - 15.9 10000b - 7.5 11000b - 3.7 00001b - 26.7 01001b - 13.3 10001b - 6.7 11001b - 3.3 00010b - 24.0 01010b - 12.0 10010b - 6.0 11010b - 3.0 00011b - 21.8 01011b - 10.9 10011b - 5.5 11011b - 2.7 00100b - 20.0 01100b - 10.0 10100b - 5.0 11100b - 2.5 00101b - 18.5 01101b - 9.2 10101b - 4.6 11101b - 2.3 00110b - 17.1 01110b - 8.6 10110b - 4.3 11110b - 2.1 00111b - 16.0 01111b - 8.0 10111b - 4.0 11111b - 2.0 ----------R11-------------------------------- CMOS 11h - AMI - ADVANCED SETUP OPTIONS Bitfields for AMI advanced setup options: Bit(s) Description (Table C010) 7 mouse enabled 6 test memory above 1 megabyte 5 generate clicks during memory test 4 enable memory parity check 3 display key for Setup while booting 2 store user-defined disk data at top of memory instead of 0030h:0000h 1 request F1 keypress on boot error ----------R11-------------------------------- CMOS 11h - AMI WinBIOS - BOOT OPTIONS SeeAlso: CMOS 13h"AMI" Bitfields for AMI WinBIOS boot options: Bit(s) Description (Table C011) 7 systems boots with high CPU speed 6 memory test above 1MB enabled 5 memory test tick sound enabled 4 floppy drive seek at boot enabled 3 "Hit " message enabled 2 BIOS extended RAM area takes 1K at top of memory instead of 30h:0000h 1 wait for F1 key on error 0 NumLock enabled at boot ----------R11-------------------------------- CMOS 11h - AWARD - CONFIGURATION BITS Bitfields for AWARD configuration bits: Bit(s) Description (Table C012) 7 NumLock ON at reboot 6 IDE Block Mode enabled 5 ??? 4 Shadow ROM BIOS at CC00-CFFF 3 Shadow ROM BIOS at C800-CBFF 2 ??? 1 BIOS Password Enabled 0 0 = Password controls BIOS Setup Only 1 = Password required to enter System ----------R11-------------------------------- CMOS 11h - Quadtel HT12 BIOS 03.05.03 - CONFIGURATION BITS Bitfields for Quadtel HT12 configuration bits: Bit(s) Description (Table C013) 7 640K RAM present 6 extension type (=CPU's Machine Status Word) 3-2 NumLock state at boot time 00 Auto 01 NumLock on 10 Numlock off 0 384K RAM relocated to top of memory ----------R12-------------------------------- CMOS 12h - IBM - HARD DISK DATA Notes: A PC with a single type 2 (20 Mb ST-225) hard disk will have 20h in byte 12h some PCs utilizing external disk controller ROMs will use type 0 to disable ROM BIOS (e.g. Zenith 248 with Plus HardCard). Bitfields for IBM hard disk data: Bit(s) Description (Table C014) 7-4 First Hard Disk Drive 00 No drive 01-0Eh Hard drive Type 1-14 0Fh Hard Disk Type 16-255 (actual Hard Drive Type is in CMOS RAM 19h) 3-0 Second Hard Disk Drive Type (same as first except extrnded type will be found in 1Ah). ----------R12-------------------------------- CMOS 12h - IBM PS/2 - SECOND FIXED DISK DRIVE TYPE (00-FFh) SeeAlso: CMOS 11h"IBM PS/2" ----------R13-------------------------------- CMOS 13h - AMI Hi-Flex BIOS - ADVANCED SETUP OPTIONS SeeAlso: CMOS 11h"WinBIOS" Bitfields for AMI Hi-Flex BIOS advanced setup options: Bit(s) Description (Table C015) 7 Mouse Enabled (1 = On) 6 Test Memory above 1 MB (1 = On) 5 Memory Test Tick Sound (1 = On) 4 Memory Parity Error Check (1 = On) 3 Press to Disable Memory Test (1 = On) 2 User-Defined Hard Disk (1 = Type 47 data area at address 0:300h) 1 Wait for Message if Error (1 = On) 0 Turn Num Lock On at boot (1 = On) ----------R13-------------------------------- CMOS 13h - AMI WinBIOS - PERIPHERAL OPTIONS Bitfields for AMI WinBIOS peripheral options: Bit(s) Description (Table C016) 7-5 typematic rate 000-111 = 6,8,10,12,15,20,24,30 cps 4 numeric processor test enabled ----------R13-------------------------------- CMOS 13h - PS/2 MCA - INTERNAL POST OPERATIONS Bitfields for PS/2 MCA internal POST operations: Bit(s) Description (Table C017) 7 POST sets VGA pel information 6 RTC battery OK 5 invoke ROM BASIC from POST 4 POST sets typematic to 30cps/250ms delay instead of 10.9cps/500ms 3-2 unused or unknown 1 network password installed 0 power-on password installed ----------R13-------------------------------- CMOS 13h - AWARD - Configuration Bits Bitfields for AWARD configuration bits: Bit(s) Description (Table C018) 7 set keyboard typematic rate 4-6 keyboard repeat rate 000 = 6 cps 001 = 8 cps 010 = 10 cps 011 = 12 cps 100 = 15 cps 101 = 20 cps 110 = 24 cps 111 = 30 cps 2-3 keyboard typematic delay 00 = 250 Msec 01 = 500 Msec 10 = 750 Msec 11 = 1000 Msec 1 ??? 0 boot up floppy seek ----------R14-------------------------------- CMOS 14h - IBM - EQUIPMENT BYTE Bitfields for IBM equipment byte: Bit(s) Description (Table C019) 7-6 number of floppy drives (system must have at least one) 00b 1 Drive 01b 2 Drives 10b ??? 3 Drives 11b ??? 4 Drives 5-4 monitor type 00b Not CGA or MDA (observed for EGA & VGA) 01b 40x25 CGA 10b 80x25 CGA 11b MDA (Monochrome) 3 display enabled (turned off to enable boot of rackmount) 2 keyboard enabled (turn off to enable boot of rackmount) 1 math coprocessor installed 0 floppy drive installed (turned off for rackmount boot) ----------R14-------------------------------- CMOS 14h - AMSTRAD - BYTE user RAM checksum Desc: LSB of sum of all user bytes should be AAh ----------R15-------------------------------- CMOS 15h - IBM - BASE MEMORY IN KB (low byte) ----------R15-------------------------------- CMOS 15h - AMSTRAD - WORD Enter key scancode/ASCII code Note: default: 1C0Dh - emulates Return key ----------R16-------------------------------- CMOS 16h - IBM - BASE MEMORY IN KB (high byte) Note: The value in 15h-16h should be the same as in 0:413h and that returned by INT 12h. A PC having 640k (280h) of conventional memory will return 80h in byte 15h and 02h in byte 16h. ----------R17-------------------------------- CMOS 17h - IBM - EXTENDED MEMORY IN KB (low byte) ----------R17-------------------------------- CMOS 17h - AMSTRAD - WORD Forward delete key scancode/ASCII code Note: default: 2207h - emulates ^G (bell/beep) ----------R18-------------------------------- CMOS 18h - IBM - EXTENDED MEMORY IN KB (high byte) Notes: some systems will only accommodate 15 MB extended (16 MB total) Format is the same as in 15h-16h ----------R19-------------------------------- CMOS 19h - IBM - FIRST EXTENDED HARD DISK DRIVE TYPE Note: not in original AT specification but now nearly universally used except for PS/2. (Table C020) Values for extended hard disk drive type: 00-0Fh unused (would not require extension. Note: this has the effect of making type 0Fh (15d) unavailable. 10h-FFh First Extended Hard Drive Type 16d-255d Note: For most manufacturers the last drive type (typically either 47d or 49d) is "user defined" and parameters are stored elsewhere in the CMOS. ----------R19-------------------------------- CMOS 19h - MCA - SLOT 0 ADAPTER CARD ID ----------R19-------------------------------- CMOS 19h - AMI - ??? Bitfields for AMI location 19h: Bit(s) Description (Table C021) 3-0 ??? 7-4 ??? ----------R191A------------------------------ CMOS 19h-1Ah - AMSTRAD - Joystick fire button 1 scancode/ASCII code Note: default: FFFFh - (no translation) ----------R1A-------------------------------- CMOS 1Ah - SECOND EXTENDED HARD DISK DRIVE TYPE SeeAlso: CMOS 19h"IBM",#C020 ----------R1A-------------------------------- CMOS 1Ah - MCA - SLOT 0 ADAPTER CARD ID ----------R1B-------------------------------- CMOS 1Bh - MCA - SLOT 1 ADAPTER CARD ID ----------R1B-------------------------------- CMOS 1Bh - AMI - First Hard Disk (type 47) user defined: # of Cylinders, LSB ----------R1B1C------------------------------ CMOS 1Bh-1Ch - AMSTRAD - Joystick fire button 2 scancode/ASCII code Note: default: FFFFh - (no translation) ----------R1B-------------------------------- CMOS 1Bh - PHOENIX - LSB of Word to 82335 RC1 roll compare register ----------R1B-------------------------------- CMOS 1Bh - AWARD - CONFIGURATION BITS Bitfields for AWARD shadow RAM configuration bits: Bit(s) Description (Table C022) 7-4 ??? 3 Shadow ROM BIOS at DC00-DFFF 2 shadow " " " D800-DBFF 1 shadow " " " D400-D7FF 0 shadow " " " D000-D3FF ----------R1C-------------------------------- CMOS 1Ch - MCA - SLOT 1 ADAPTER CARD ID ----------R1C-------------------------------- CMOS 1Ch - AMI - First Hard Disk user defined: # of Cylinders, High Byte ----------R1C-------------------------------- CMOS 1Ch - PHOENIX - MSB of Word to 82335 RC1 roll compare register ----------R1C-------------------------------- CMOS 1Ch,1Dh - AWARD - Password Note: Stored as a checksum or CRC using unknown algorithm. (See byte 11h to enable) ----------R1D-------------------------------- CMOS 1Dh - MCA - SLOT 2 ADAPTER CARD ID ----------R1D-------------------------------- CMOS 1Dh - AMI - First Hard Disk user defined: Number of Heads ----------R1D-------------------------------- CMOS 1Dh - AMSTRAD - WORD mouse button 1 scancode/ASCII code Note: default: FFFFh - (no translation) ----------R1D-------------------------------- CMOS 1Dh - Zenith Z-200 monitor - BOOT DRIVE SELECTION Bitfields for Zenith Z-200 boot drive selection: Bit(s) Description (Table C023) 6-5 (0xx0 0000) 00 - MFM Monitor 01 - First floppy drive (A:) 10 - First fixed disk (C:) 11 - First floppy drive (A:). If not there then First fixed disk (C:) (this is the default). ----------R1D-------------------------------- CMOS 1Dh - PHOENIX - LSB of Word to 82335 RC2 roll compare register ----------R1D-------------------------------- CMOS 1Dh - AWARD - MSB of password checksum (see byte 1Ch) ----------R1D-------------------------------- CMOS 1Dh - Quadtel HT 12 BIOS - first user def. drive: # of cylinders low byte ----------R1E-------------------------------- CMOS 1Eh - MCA - SLOT 2 ADAPTER CARD ID ----------R1E-------------------------------- CMOS 1Eh - AMI - First Hard Disk user defined: WPC-low Desc: Write Precompensation Cylinder, Low Byte, for first user-defined hard disk ----------R1E-------------------------------- CMOS 1Eh - PHOENIX - MSB of Word to 82335 RC2 roll compare register ----------R1E-------------------------------- CMOS 1Eh - AWARD - 2nd Hard Disk user defined: # of Cylinders Low Byte ----------R1E-------------------------------- CMOS 1Eh - Quadtel HT 12 BIOS - FIRST USER DEFINED DRIVE Bitfields for Quadtel HT-12 user-defined drive heads/cylinders: Bit(s) Description (Table C024) 7-4 number of heads 3-0 number of cylinders (MSB) ----------R1F-------------------------------- CMOS 1Fh - MCA - SLOT 3 ADAPTER CARD ID ----------R1F-------------------------------- CMOS 1Fh - AMI - First Hard Disk user defined: WPC-high Desc: Write Precompensation Cylinder, high byte, for first user-defined hard disk ----------R1F-------------------------------- CMOS 1Fh - AMSTRAD - WORD mouse button 2 scancode/ASCII code Note: default: FFFFh - (no translation) ----------R1F-------------------------------- CMOS 1Fh - AWARD - 2nd Hard Disk user defined (type 48): # of Cylinders High ----------R1F-------------------------------- CMOS 1Fh - Quadtel HT 12 BIOS - first user def. drive: WPC-low Desc: Write Precompensation Cylinder, low byte, for first user-defined hard disk ----------R20-------------------------------- CMOS 20h - MCA - SLOT 3 ADAPTER CARD ID ----------R20-------------------------------- CMOS 20h - AMI - First Hard Disk user defined: Control Byte Bitfields for AMI user-defined hard disk control byte: Bit(s) Description (Table C025) 7-6 no retries (1) 5 bad sector map at last cylinder+1 4 unused (0) 3 more than 8 heads 2-0 unused (0) ----------R20-------------------------------- CMOS 20h - AMI WinBIOS - First Hard Disk user defined: Landing Zone, Low Byte ----------R20-------------------------------- CMOS 20h - PHOENIX - First user defined hard disk (type 48) Cylinders LSB ----------R20-------------------------------- CMOS 20h - AWARD - 2nd Hard Disk user defined (type 48): Number of Heads ----------R20-------------------------------- CMOS 20h - Quadtel HT 12 BIOS - FIRST USER DEFINED DRIVE SeeAlso: CMOS 26h"Quadtel" Bitfields for Quadtel landing zone/write-precompensation: Bit(s) Description (Table C026) 7-4 landing zone MSB 3-0 write precom. cyl. MSB ----------R21-------------------------------- CMOS 21h - MCA - Programmable Option Select configuration byte 2 ----------R21-------------------------------- CMOS 21h - AMI - First Hard Disk user defined: Landing Zone, Low Byte ----------R21-------------------------------- CMOS 21h - AMI WinBIOS - First Hard Disk user defined: Landing Zone, High Byte ----------R21-------------------------------- CMOS 21h - AMSTRAD - MOUSE X SCALING FACTOR Note: default: 0Ah ----------R21-------------------------------- CMOS 21h - PHOENIX - First user defined hard disk (type 48) Cylinders MSB ----------R21-------------------------------- CMOS 21h - AWARD - 2nd Hard Disk user defined (type 48): Write Precomp Low Byte ----------R21-------------------------------- CMOS 21h - Quadtel HT 12 BIOS - first user def. drive: landing zone low byte ----------R22-------------------------------- CMOS 22h - MCA - Programmable Option Select configuration byte 3 ----------R22-------------------------------- CMOS 22h - AMI - First Hard Disk user defined: Landing Zone, High Byte ----------R22-------------------------------- CMOS 22h - AMI WinBIOS - First Hard Disk user defined: # of Sectors per track ----------R22-------------------------------- CMOS 22h - AMSTRAD - MOUSE Y SCALING FACTOR Note: default: 0Ah ----------R22-------------------------------- CMOS 22h - PHOENIX - First user defined hard disk (type 48) of Heads ----------R22-------------------------------- CMOS 22h - AWARD - 2nd Hard Disk user defined (type 48): Write Precomp High Byte ----------R22-------------------------------- CMOS 22h - Quadtel HT 12 BIOS - first user def. drive: sectors per track ----------R23-------------------------------- CMOS 23h - MCA - Programmable Option Select configuration byte 4 ----------R23-------------------------------- CMOS 23h - AMI - First Hard Disk user defined: # of Sectors per track ----------R23-------------------------------- CMOS 23h - AMI WinBIOS - Second Hard Disk user defined: # Cylinders, Low Byte ----------R23-------------------------------- CMOS 23h - AMSTRAD - INITIAL VDU MODE AND DRIVE COUNT Note: default: 20h Bitfields for Amstrad initial VDU mode/drive count: Bit(s) Description (Table C027) 7 enables extended serial flow control (NB this is buggy) 6 set if two floppy drives installed 5-4 (from Amstrad 1640 tech ref) 00 Internal video adapter 01 CGA card added; 40 x 25 mode 10 CGA card added; 80 x 25 mode 11 mono card added; 80 x 25 mode ----------R23-------------------------------- CMOS 23h - PHOENIX - First user defined hard disk (type 48) Write Precomp. LSB ----------R23-------------------------------- CMOS 23h - AWARD - 2nd Hard Disk user defined (type 48): Landing Zone Low Byte ----------R23-------------------------------- CMOS 23h - Quadtel HT 12 BIOS - second user def. drive: # of cylinders low byte ----------R24-------------------------------- CMOS 24h - MCA - Programmable Option Select configuration byte 5 ----------R24-------------------------------- CMOS 24h - AMI - Second Hard Disk user defined: # Cylinders, Low Byte ----------R24-------------------------------- CMOS 24h - AMI WinBIOS - Second Hard Disk user defined: # Cylinders, High Byte ----------R24-------------------------------- CMOS 24h - AMSTRAD - INITIAL VDU CHARACTER ATTRIBUTE Note: default: 7h ----------R24-------------------------------- CMOS 24h - PHOENIX - First user defined hard disk (type 48) Write Precomp. MSB ----------R24-------------------------------- CMOS 24h - AWARD - 2nd Hard Disk user defined (type 48): Landing Zone High Byte ----------R24-------------------------------- CMOS 24h - Quadtel HT 12 BIOS - SECOND USER DEFINED DRIVE SeeAlso: CMOS 1Eh"Quadtel",#C024 ----------R25-------------------------------- CMOS 25h - AMI - Second Hard Disk user defined: # of Cylinders, High Byte ----------R25-------------------------------- CMOS 25h - AMI WinBIOS - Second Hard Disk user defined: Number of Heads ----------R25-------------------------------- CMOS 25h - AMSTRAD - size of RAM disk in 2K blocks Note: default: 0 - only used by the RAMDISK software supplied. ----------R25-------------------------------- CMOS 25h - PHOENIX - First user defined hard disk (type 48) Parking zone LSB ----------R25-------------------------------- CMOS 25h - AWARD - 2nd Hard Disk user defined (type 48): Sectors per Track ----------R25-------------------------------- CMOS 25h - Quadtel HT 12 BIOS - second user def. drive: WPC-low Desc: Write Precompensation Cylinder, low byte ----------R26-------------------------------- CMOS 26h - AMI - Second Hard Disk user defined: Number of Heads ----------R26-------------------------------- CMOS 26h - AMI WinBIOS - Second Hard Disk user defined: WPC-low Desc: Write Precompensation Cylinder, Low Byte ----------R26-------------------------------- CMOS 26h - AMSTRAD - INITIAL SYSTEM UART SETUP BYTE Note: default: E3h - format as for Int 14h fn 0 ----------R26-------------------------------- CMOS 26h - PHOENIX - First user defined hard disk (type 48) Parking zone MSB ----------R26-------------------------------- CMOS 26h - AWARD - 1st Hard Disk user defined (type 49): # Cylinders, Low Byte ----------R26-------------------------------- CMOS 26h - Quadtel HT 12 BIOS - SECOND USER DEFINED DRIVE SeeAlso: CMOS 20h"Quadtel",#C026 ----------R27-------------------------------- CMOS 27h - AMI - Second Hard Disk user defined: WPC-low Desc: Write Precompensation Cylinder, Low Byte ----------R27-------------------------------- CMOS 27h - AMI WinBIOS - Second Hard Disk user defined: WPC-high Desc: Write Precompensation Cylinder, High Byte ----------R27-------------------------------- CMOS 27h - AMSTRAD - INITIAL EXTERNAL UART SETUP BYTE Note: default: E3h - format as for Int 14h fn 0 ----------R27-------------------------------- CMOS 27h - PHOENIX - First user defined hard disk (type 48) Sectors per track ----------R27-------------------------------- CMOS 27h - AWARD - 1st Hard Disk user defined (type 49): # Cylinders, High Byte ----------R27-------------------------------- CMOS 27h - Quadtel HT 12 BIOS - SECOND USER DEF. DRIVE: landing zone low byte ----------R28-------------------------------- CMOS 28h - AMI - Second Hard Disk user defined: WPC-high Desc: Write Precompensation Cylinder, High Byte ----------R28-------------------------------- CMOS 28h - AMI WinBIOS - Second Hard Disk user defined: Landing Zone, Low Byte ----------R28-------------------------------- CMOS 28h - HP Vectra - checksum over bytes 29h-2Dh ----------R28-------------------------------- CMOS 28h - AWARD - 1st Hard Disk user defined (type 49): Number of Heads ----------R28-------------------------------- CMOS 28h - Quadtel HT 12 BIOS - second user def. drive: sectors per track ----------R283F------------------------------ CMOS 28h-3Fh - AMSTRAD - user applications default: zeroes ----------R29-------------------------------- CMOS 29h - AMI - Second Hard Disk user defined: Control Byte Note: 80h if # of heads is equal or greater than 8 ----------R29-------------------------------- CMOS 29h - AMI WinBIOS - Second Hard Disk user defined: Landing Zone, High Byte ----------R29-------------------------------- CMOS 29h - PHOENIX - LSB word to Intel 82335 CC0 compare register ----------R29-------------------------------- CMOS 29h - AWARD - 1st Hard Disk user defined (type 49): Write Precomp Low Byte ----------R29-------------------------------- CMOS 29h - HP Vectra - OFFICIALLY RESERVED "CMOS_HPCONFIG" Bitfields for HP Vectra CMOS_HPCONFIG: Bit(s) Description (Table C028) 7 include byte 2Ch in checksum (default = 0) 6 select second ROM video adapter as primary (default = 0) 5-1 reserved 0 manufacturing test enabled ----------R2A-------------------------------- CMOS 2Ah - AMI - Second Hard Disk user defined: Landing Zone, Low Byte ----------R2A-------------------------------- CMOS 2Ah - AMI WinBIOS - Second Hard Disk user defined: # of Sectors per track ----------R2A-------------------------------- CMOS 2Ah - HP Vectra - OFFICIALLY RESERVED ----------R2A-------------------------------- CMOS 2Ah - PHOENIX - MSB word to Intel 82335 CC0 compare register ----------R2A-------------------------------- CMOS 2Ah - AWARD - 1st Hard Disk user defined (type 49): Write Precomp High ----------R2B-------------------------------- CMOS 2Bh - AMI - Second Hard Disk user defined: Landing Zone, High Byte ----------R2B-------------------------------- CMOS 2Bh - AMI WinBIOS - IDE and shadowing control Bitfields for AMI WinBIOS IDE/shadowing control: Bit(s) Description (Table C029) 7 LBA mode enabled 6 IDE block mode enabled 5 32-bit transfer enabled 4 unused 3 shadowing of DC00h enabled 2 shadowing of D800h enabled 1 shadowing of D400h enabled 0 shadowing of D000h enabled SeeAlso: #C030 ----------R2B-------------------------------- CMOS 2Bh - HP Vectra - OFFICIALLY RESERVED ----------R2B-------------------------------- CMOS 2Bh - PHOENIX - LSB word to Intel 82335 CC1 compare register ----------R2B-------------------------------- CMOS 2Bh - AWARD - 1st Hard Disk user defined (type 49): Landing Zone Low Byte ----------R2C-------------------------------- CMOS 2Ch - AMI - Second Hard Disk user defined: # of Sectors per track ----------R2C-------------------------------- CMOS 2Ch - AMI WinBIOS - CACHE CONTROL Bitfields for AMI WinBIOS cache control: Bit(s) Description (Table C030) 7 external RAM cache enabled 6 internal RAM cache enabled 5 shadowing of E000h enabled 4 shadowing of CC00h enabled 3 shadowing of C800h enabled 2 shadowing of C400h (video ROM) enabled 1 shadowing of C000h (video ROM) enabled 0 shadowing of system BIOS (F000h, 64K) enabled SeeAlso: #C029 ----------R2C-------------------------------- CMOS 2Ch - HP Vectra - OFFICIALLY RESERVED ----------R2C-------------------------------- CMOS 2Ch - COMPAQ - NumLock CONTROL Bitfields for Compaq NumLock control: Bit(s) Description (Table C031) 6 0 - numlock OFF on boot, 1 - numlock ON at boot ----------R2C-------------------------------- CMOS 2Ch - PHOENIX - MSB word to Intel 82335 CC1 compare register ----------R2C-------------------------------- CMOS 2Ch - AWARD - 1st Hard Disk user defined (type 49): Landing Zone High Byte ----------R2D-------------------------------- CMOS 2Dh - AMI Hi-Flex BIOS - CONFIGURATION OPTIONS Bitfields for AMI Hi-Flex BIOS configuration options: Bit(s) Description (Table C032) 7 Weitek Installed 6 Floppy Drive Seek - turn off for fast boot 5 Boot Order 0 - Drive C:, then A: 1 - Drive A:, then C: 4 Boot Speed (0 - Low; 1 - High) 3 External Cache Enable (1 = On) 2 Internal Cache Enable (1 = On) 1 Use Fast Gate A20 after boot (1 = On) 0 Turbo Switch (1 = On) ----------R2D-------------------------------- CMOS 2Dh - AMI WinBIOS - flags Bitfields for AMI WinBIOS flags: Bit(s) Description (Table C033) 7 Weitek Installed 6 bootsector virus protection enabled 5 mouse enabled 4 password checking (0 setup, 1 always) 3 parity error check enabled 2-1 boot order (00 = C:A:, 01 = A:C:) 0 turbo switch enabled ----------R2D-------------------------------- CMOS 2Dh - HP Vectra - OFFICIALLY RESERVED ----------R2D-------------------------------- CMOS 2Dh - PHOENIX - ??? Note: checks for values AAh or CCh ----------R2D-------------------------------- CMOS 2Dh - AWARD - 1st Hard Disk user defined (type 49): Sectors per Track ----------R2E-------------------------------- CMOS 2Eh - IBM - Standard CMOS Checksum, High Byte ----------R2F-------------------------------- CMOS 2Fh - IBM - Standard CMOS Checksum, Low Byte 2Eh and 2Fh are as defined by the original IBM PC/AT specification and represent a byte-wise additive sum of the values in locations 10h-2Dh only, 00h-0Fh and 30h-33h are not included. This definition is used by most clone manufacturers including AMI, Compaq, Tandon, NEC, and Zenith. The IBM PS/2 line does not follow this standard with the range 19h-31h being undefined. On the original HP Vectra, this checksum only covers locations 10h to 20h, with a separate checksum for bytes 29h-2Ch (see offset 28h). ----------R30-------------------------------- CMOS 30h - IBM - EXTENDED MEMORY IN KB (low byte) SeeAlso: CMOS 17h"IBM",CMOS 31h ----------R31-------------------------------- CMOS 31h - IBM - EXTENDED MEMORY IN KB (high byte) (this appears to mirror the value in bytes 17h-18h.) SeeAlso: CMOS 18h"IBM",CMOS 30h ----------R32-------------------------------- CMOS 32h - IBM - CENTURY BYTE (BCD value for the century - currently 19h) ----------R32-------------------------------- CMOS 32h - IBM PS2 - CONFIGURATION CRC LOW BYTE Desc: CRC for range 10h-31h SeeAlso: CMOS 33h"PS/2" ----------R33-------------------------------- CMOS 33h - IBM - INFORMATION FLAG Bitfields for IBM information flag: Bit(s) Description (Table C034) 7 128K ??? believe this indicates the presence of the special 128k memory expansion board for the AT to boost the "stock" 512k to 640k - all machines surveyed have this bit set) 6-0 ??? ----------R33-------------------------------- CMOS 33h - IBM PS/2 - CONFIGURATION CRC HIGH BYTE (see entry for 32h) SeeAlso: CMOS 32h"PS/2" ----------R33-------------------------------- CMOS 33h - PHOENIX - Bit 4 (000x 0000) bit 4 from Intel CPU register CR0 ----------R33-------------------------------- CMOS 33h - AMI WinBIOS - INFORMATION FLAGS Bitfields for AMI WinBIOS information flags: Bit(s) Description (Table C035) 7 IBM-defined top 128K present 6-4 CPU internal clock frequency 000-011 = 25, 33, 40, 50 MHz 100 = 60/66 MHz 101 = 75 MHz 110 = 80 MHz 111 = 90/100 MHz 2-1 CPU internal clock multiplier 00-11 = 1,2,3,4 0 FlashROM programming enabled (Ctrl-Home pressed at power on) Note: this location is not included in any CMOS checksum fields ----------R33-------------------------------- CMOS 33h - Quadtel HT12 BIOS 03.05.03 - INFORMATION FLAGS Bitfields for Quadtel HT12 information flags: Bit(s) Description (Table C036) 7 640K RAM present 6 extension type (=CPU's Machine Status Word) 1 print welcome message ----------R34-------------------------------- CMOS 34h - AMI - SHADOWING & BOOT PASSWORD SeeAlso: CMOS 35h"AMI" Bitfields for AMI shadowing control 1: Bit(s) Description (Table C037) 7-6 password selection 00b Disable 10b Reserved 01b Set 11b Boot 5 C8000h Shadow ROM (Bit 1 = On) 4 CC000h Shadow ROM (Bit 1 = On) 3 D0000h Shadow ROM (Bit 1 = On) 2 D4000h Shadow ROM (Bit 1 = On) 1 D8000h Shadow ROM (Bit 1 = On) 0 DC000h Shadow ROM (Bit 1 = On) SeeAlso: #C038 ----------R34-------------------------------- CMOS 34h - AMI - EXTENDED MEMORY >16M (low byte) Note: this and the following byte contain the total extended memory in 64K blocks SeeAlso: CMOS 35h"AMI" ----------R34-------------------------------- CMOS 34h - (AMI WinBIOS) system-specific information (bits 3-1) ----------R343A------------------------------ CMOS 34h-3Ah - (AWARD) ??? unused ??? Defaults to all FFh's. ----------R35-------------------------------- CMOS 35h - AMI - EXTENDED MEMORY >16M (high byte) Note: this and the previous byte contain the total extended memory in 64K blocks SeeAlso: CMOS 34h"AMI" ----------R35-------------------------------- CMOS 35h - AMI - SHADOWING CONTROL 2 SeeAlso: CMOS 34"AMI" Bitfields for AMI shadowing control 2: Bit(s) Description (Table C038) 7 E0000h Shadow ROM (Bit 1 = On) 6 E4000h Shadow ROM (Bit 1 = On) 5 E8000h Shadow ROM (Bit 1 = On) 4 EC000h Shadow ROM (Bit 1 = On) 3 F0000h Shadow ROM (Bit 1 = On) 2 C0000h Shadow ROM (Bit 1 = On) 1 C4000h Shadow ROM (Bit 1 = On) 0 reserved SeeAlso: #C037 ----------R35-------------------------------- CMOS 35h - AMI WinBIOS - EXTENDED MEMORY SIZE IN 64K BLOCKS (low byte) SeeAlso: CMOS 36h"AMI WinBIOS" ----------R35-------------------------------- CMOS 35h - PHOENIX - Second user defined hard disk (type 48) Cylinders LSB Note: used only when PS/2 style password is NOT in effect ----------R35-------------------------------- CMOS 35h - AMI 1990 Hyundai super-NB368S notebook Bitfields for Hyundai configuration: Bit(s) Description (Table C039) 3-1 shadowing 000 shadow disabled 011 video BIOS shadowed 100 main BIOS shadowed 111 both 0 coprocessor enabled ----------R36-------------------------------- CMOS 36h - PHOENIX - Second user defined hard disk (type 48) Cylinders MSB Note: used only when PS/2 style password is NOT in effect. ----------R36-------------------------------- CMOS 36h - AWARD - IDE control Bitfields for AWARD IDE control: Bit(s) Description (Table C040) 6 IDE 32-bit transfer mode ----------R36-------------------------------- CMOS 36h - AMI - ??? Bitfields for AMI ???: Bit(s) Description (Table C041) 1-0 ??? 3-2 ??? ----------R36-------------------------------- CMOS 36h - AMI WinBIOS - EXTENDED MEMORY SIZE IN 64K BLOCKS (high byte) ----------R36-------------------------------- CMOS 36h - AMI 1990 Hyundai super-NB368S notebook - CPU/VIDEO CONFIGURATION Bitfields for Hyundai CPU/video control: Bit(s) Description (Table C042) 7 =1 LCD, 0 CRT at boot time 6 =1 reversed, 0 normal video mode 5 =1 external, 0 internal keyboard 4-3 CPU speed 00 high 01 medium 10 low 2-1 harddisk vendor 1,2,3,4 0 relocation enabled ----------R36-------------------------------- CMOS 36h - Quadtel HT12 BIOS 03.05.03 - EXTENDED MEMORY (low byte) ----------R37-------------------------------- CMOS 37h - IBM PS/2 - DATE CENTURY BYTE ----------R37-------------------------------- CMOS 37h - PHOENIX - Second user defined hard disk (type 48) # of heads NOTE: used only when PS/2 style password is NOT in effect. ----------R37-------------------------------- CMOS 37h - AMI Hi-Flex BIOS - ??? Bitfields for AMI Hi-Flex BIOS location 37h: Bit(s) Description (Table C043) 7 ??? ----------R37-------------------------------- CMOS 37h - AMI WinBIOS - SETUP COLORS, PASSWORD SEED Bitfields for AMI WinBIOS setup colors and password seed: Bit(s) Description (Table C044) 7-4 password seed 3-0 WinBIOS/AMIBIOS setup color options ----------R37-------------------------------- CMOS 37h - Quadtel HT12 BIOS 03.05.03 - EXTENDED MEMORY (high byte) ----------R373A------------------------------ CMOS 37h-3Ah - AMI 1990 Hyundai super-NB368S notebook - PASSWORD Desc: encoded password, max 4 bytes. ----------R38-------------------------------- CMOS 38h - PHOENIX - Second user defined hard disk (type 48) Write Precomp. LSB Note: used only when PS/2 style password is NOT in effect. ----------R383D------------------------------ CMOS 38h-3Dh - AMI - Encrypted Password ----------R383F------------------------------ CMOS 38h-3Fh - ??? IBM PS/2 - Encrypted Password Note: Initialized to 00h in all bytes. Will accept from 1-7 scan codes. ----------R39-------------------------------- CMOS 39h - PHOENIX - Second user defined hard disk (type 48) Write Precomp. MSB Note: used only when PS/2 style password is NOT in effect. ----------R3A-------------------------------- CMOS 3Ah - PHOENIX - Second user defined hard disk (type 48) Parking Zone LSB Note: used only when PS/2 style password is NOT in effect. ----------R3B-------------------------------- CMOS 3Bh - PHOENIX - Second user defined hard disk (type 48) Parking Zone MSB Note: used only when PS/2 style password is NOT in effect. ----------R3B-------------------------------- CMOS 3Bh - AWARD - CONFIGURATION BITS Bitfields for AWARD configuration bits: Bit(s) Description (Table C045) 4-7 Screen Colors Used in Setup (see #C046) 3 ??? Default = 0 2 ??? Default = 0 1 ??? Default = 1 0 Enable External Cache (Table C046) Values for AWARD setup colors: 0000 Yellow/White on Blue (Default) 0001 Magenta/White on Blue 0010 Yellow/Black on Green 0011 Yellow/Green on Cyan 0100 Black/Yellow on Cyan 0101 Brown/White on Cyan 0110 White/Green on Red 0111 White/White on Red 1000 Green/White on Magenta 1001 Yellow/Red on Magenta 1010 Red/White on Grey 1011 Yellow/White on Grey 1100 Cyan/White on Grey 1101 Cyan/Yellow on Black 1110 White on Black (Monochrome) 1111 Green/Red on Black SeeAlso: #C045 ----------R3C-------------------------------- CMOS 3Ch - PHOENIX - Second user defined hard disk (type 48) Sectors per track Note: used only when PS/2 style password is NOT in effect. ----------R3C-------------------------------- CMOS 3Ch - AWARD - Boot Configuration Bits Bitfields for AWARD boot configuration bits: Bit(s) Description (Table C047) 7 disable virus warning on boot 6,5 ??? 4 Quick POST Enabled 3,2 ??? 1 Enable Turbo Switch Input 0 0 = Boot from A, then C 1 = Boot from C, then A ----------R3C-------------------------------- CMOS 3Ch - Quadtel HT12 BIOS 03.05.03 - TOTAL MEMORY (low byte) SeeAlso: CMOS 3Dh"Quadtel" ----------R3D-------------------------------- CMOS 3Dh - AWARD - ??? ----------R3D-------------------------------- CMOS 3Dh - Phoenix - ??? Note: bit 3 = base memsize 512K/640K ----------R3D-------------------------------- CMOS 3Dh - Quadtel HT12 BIOS 03.05.03 - TOTAL MEMORY (high byte) SeeAlso: CMOS 3Ch"Quadtel" ----------R3E-------------------------------- CMOS 3Eh - AMI - Extended CMOS Checksum, High Byte Note: this checksum covers locations 34h - 3Dh, but is not used by some later AMI BIOSes ----------R3E-------------------------------- CMOS 3Eh - AWARD - BOOT CONFIGURATION BITS Bitfields for AWARD boot configuration bits: Bit(s) Description (Table C048) 7 Shadow Video BIOS at C000h 6,5 ??? 4 Swap Floppy Drive 3 ??? 2 Don't Halt on Diskette Errors at Boot 1 Don't Halt on Keyboard Errors at Boot 0 Never Halt for any error at Boot ----------R3E-------------------------------- CMOS 3Eh - Quadtel HT12 BIOS 03.05.03 - ??? Bitfields for Quadtel ???: Bit(s) Description (Table C049) 2 system error occurred ?? (timer/RTC) 0 =0 extended system configuration loaded =1 checksum error ----------R3E-------------------------------- CMOS 3Eh - Phoenix - SHADOWING CONTROL Bitfields for Phoenix shadowing control: Bit(s) Description (Table C050) 7 relocate enable 1 shadow video enable 0 shadow BIOS enable ----------R3F-------------------------------- CMOS 3Fh - AMI - Extended CMOS Checksum, Low Byte Note: this checksum covers locations 34h - 3Dh, but is not used by some later AMI BIOSes ----------R3F-------------------------------- CMOS 3Fh - AWARD - ??? --------------------------------------------- End of original 64 CMOS RAM bytes. Many modern chips now contain 128 bytes and the IBM PS/2 has provision for 2k of "Expansion CMOS". The AMI HI-FLEX description is below. If the chip does have only 64 bytes, addresses will wrap so that requests for bytes 40h-7Fh will return the same values as 00h-3Fh. ----------R40-------------------------------- CMOS 40h - AMI 1990 Hyundai super-NB368S notebook - POWER-SAVE CONFIGURATION Bitfields for Hyundai power-save configuration: Bit(s) Description (Table C051) 7 power save enabled 6-0 HD power save wait, units of 1 minute (0-20) ----------R40-------------------------------- CMOS 40h - AWARD - Motherboard Chipset (SiS 85C501/85C502 shown) Bitfields for AWARD motherboard chipset: Bit(s) Description (Table C052) 7-1 ??? 0 Automatic Configuration Enabled (Default: 1=enabled) ----------R4055------------------------------ CMOS 40h-55h - AMI WinBIOS - PCI BIOS setup data ----------R41-------------------------------- CMOS 41h - AMI - WAIT STATE CONFIGURATION Bitfields for AMI wait state configuration: Bit(s) Description (Table C053) 7-6 IOR/IOW Wait states 5-4 16-bit DMA Wait States 3-2 8-bit DMA Wait States 1 EMR bit 0 DMA Clock Source ----------R4243------------------------------ CMOS 42h-43h - ??? ----------R4244------------------------------ CMOS 42h-44h - AWARD - ??? chipset setup ??? ----------R44-------------------------------- CMOS 44h - AMI - NMI CONTROL Bitfields for AMI NMI control: Bit(s) Description (Table C054) 4 NMI Power Fail Warning 3 NMI Local Bus Timeout ----------R45-------------------------------- CMOS 45h - AMI - BUS DELAYS Bitfields for AMI bus delays: Bit(s) Description (Table C055) 7-6 AT Bus 32-Bit Delay 5-4 AT Bus 16-Bit Delay 3-2 AT Bus 8-Bit Delay 1-0 AT Bus I/O Delay SeeAlso: #C058 ----------R45-------------------------------- CMOS 45h - AMI (Saturn) - CACHE TAGS SeeAlso: CMOS 46h"Saturn" Bitfields for AMI (Saturn) cache tags: Bit(s) Description (Table C056) 7 base memory 640K instead of 512K 4-3 external cache tag width 00 8 bits 01 9 bits 10 7 bits 11 7 bits ----------R45-------------------------------- CMOS 45h - AWARD - Motherboard Chipset (SiS 85C501/85C502 shown) Bitfields for AWARD motherboard chipset: Bit(s) Description (Table C057) 7 System BIOS Cacheable (Default: 1=enabled) 6 Video BIOS Cacheable (Default: 1=enabled) 5-0 ??? ----------R46-------------------------------- CMOS 46h - AMI - BUS WAIT STATES Bitfields for AMI bus wait states: Bit(s) Description (Table C058) 7-6 AT Bus 32 Bit Wait States 5-4 AT Bus 16 Bit Wait States 3-2 AT Bus 8 Bit Wait States 1-0 AT Bus Clock Source SeeAlso: #C055 ----------R46-------------------------------- CMOS 46h - AMI (Saturn) - SHADOW RAM CONTROL 1 Bitfields for AMI (Saturn) shadow RAM control 1: Bit(s) Description (Table C059) 7-6 D000h-D3FFh shadow RAM 00 don't shadow 01 absent 10 shadow 11 reserved 5-4 CC00h-CFFFh shadow RAM (as for D000h-D3FFh) 3-2 C800h-CBFFh shadow RAM (as for D000h-D3FFh) 1-0 C000h-C7FFh shadow RAM (as for D000h-D3FFh) SeeAlso: #C060 ----------R4647------------------------------ CMOS 46h-47h - AWARD - ??? chipset setup ??? ----------R47-------------------------------- CMOS 47h - AMI (Saturn) - SHADOW RAM CONTROL 2 Bitfields for AMI (Saturn) shadow RAM control 2: Bit(s) Description (Table C060) 7-6 DC00h-DFFFh shadow RAM 00 don't shadow 01 absent 10 shadow 11 reserved 5-4 D800h-DBFFh shadow RAM (as for DC00h-DFFFh) 3-2 D400h-D7FFh shadow RAM (as for DC00h-DFFFh) 0 PCI VGA palette snooping SeeAlso: #C059 ----------R4750------------------------------ CMOS 47h-50h - ??? ----------R484F------------------------------ CMOS 48h-4Fh - AWARD - ??? unused ??? Defaults to all FFh's. ----------R48-------------------------------- CMOS 48h - AMI (Saturn) - EXTERNAL CACHE Bitfields for AMI (Saturn) external cache: Bit(s) Description (Table C061) 5 external cache write-back instead of write-through ----------R49-------------------------------- CMOS 49h - AMI (Saturn) - PERFORMANCE Bitfields for AMI (Saturn) performance: Bit(s) Description (Table C062) 1 DRAM enhanced performance mode 0 ISA/DMA enhanced performance mode SeeAlso: #C063 ----------R4A-------------------------------- CMOS 4Ah - AMI (Saturn) - BUS CONFIGURATION Bitfields for AMI (Saturn) bus configuration: Bit(s) Description (Table C063) 7 ISA enhanced performance mode 6 ISA bus master installed 5-4 PCI slot IRQ 00 IRQ5 01 IRQ9 10 IRQ15 11 IRQ15 3 PCI on-board SCSI controller enabled 1-0 ISA frame buffer 00 disabled 01 1MB at 15MB 10 2MB at 14MB 11 4MB at 12MB SeeAlso: #C062 ----------R4B-------------------------------- CMOS 4Bh - AMI (Saturn) - ON-BOARD PERIPHERALS Bitfields for AMI (Saturn) on-board peripherals: Bit(s) Description (Table C064) 4 onboard FDC enabled 0 onboard IDE enabled ----------R4C-------------------------------- CMOS 4Ch - AMI (Saturn) - PARALLEL PORT Bitfields for AMI (Saturn) parallel port: Bit(s) Description (Table C065) 4 IRQ active high 3 parallel port extended mode 1-0 parallel port address ----------R4C-------------------------------- CMOS 4Ch - AMI (PicoPower) - CLOCK SPEEDS Bitfields for AMI (PicoPower) clock speeds: Bit(s) Description (Table C066) 7-6 back-to-back I/O delay 00 none 01 1 SYSCLK 10 2 SYSCLKs 11 3 SYSCLKs 5-3 Turbo clock select 001 CLK2IN/3 010 CLK2IN/4 011 CLK2IN/5 100 CLK2IN/6 101 CLK2IN/7 110 CLK2IN/8 111 CLK2IN/9 2-0 SYSCLK select (same as for Turbo clock select) ----------R4D-------------------------------- CMOS 4Dh - AMI (Saturn) - RESERVED ----------R4D-------------------------------- CMOS 4Dh - AMI (PicoPower) - MIDDLE BIOS Note: Middle BIOS is enabled if bit 1 set ----------R4E-------------------------------- CMOS 4Eh - AMI (Saturn) - SERIAL PORT Bitfields for AMI (Saturn) serial port: Bit(s) Description (Table C067) 7-5 serial port 1 4-2 serial port 2 0 manual programming mode ----------R4E-------------------------------- CMOS 4Eh - AMI (PicoPower) - TURBO BUS VIDEO Bitfields for AMI (PicoPower) Turbo Bus video: Bit(s) Description (Table C068) 2 memory enabled 1 I/O enabled ----------R50-------------------------------- CMOS 50h - AWARD - PCI Bus Slot 1 Latency Timer 0-255 (default: 0) ----------R51-------------------------------- CMOS 51h - AMI - MEMORY ACCESS CONTROL Bitfields for AMI memory access control: Bit(s) Description (Table C069) 7 Bank 0/1 RAS Precharge 6 Bank 0/1 Access Wait States 3-2 Bank 0/1 Wait States ----------R51-------------------------------- CMOS 51h - AWARD - PCI Bus Setup Bitfields for AWARD PCI bus setup: Bit(s) Description (Table C070) 7 PIRQ0# Interrupt Triggering 0 = Edge Sensitive, 1 = Level Sensitive 6-2 ??? Default: all 1's 0-1 Slot 1 IRQ Setup 00 = A-PIRQ0 (Default) 01 = B-PIRQ1 10 = C-PIRQ2 11 = D-PIRQ3 ----------R52-------------------------------- CMOS 52h - ??? ----------R52-------------------------------- CMOS 52h - AWARD - PCI Bus Slot 2 Latency Timer 0-255 (default: 0) ----------R53-------------------------------- CMOS 53h - AMI - MEMORY ACCESS CONTROL Bitfields for AMI memory access control: Bit(s) Description (Table C071) 7 Bank 2/3 RAS Precharge 6 Bank 2/3 Access Wait States 3-2 Bank 2/3 Wait States ----------R53-------------------------------- CMOS 53h - AWARD - PCI Bus Setup Bitfields for AWARD PCI bus setup: Bit(s) Description (Table C072) 7 PIRQ1# Interrupt Triggering 0 = Edge Sensitive, 1 = Level Sensitive 6-2 ??? Default: all 1's 0-1 Slot 2 IRQ Setup 00 = A-PIRQ1 (Default) 01 = B-PIRQ2 10 = C-PIRQ3 11 = D-PIRQ0 ----------R547F------------------------------ CMOS 54h-7Fh - ??? ----------R54-------------------------------- CMOS 54h - AWARD - PCI Bus Slot 3 Latency Timer 0-255 (default: 0) ----------R55-------------------------------- CMOS 55h - AWARD - PCI Bus Setup Bitfields for AWARD PCI bus setup: Bit(s) Description (Table C073) 7 PIRQ2# Interrupt Triggering 0 = Edge Sensitive, 1 = Level Sensitive 6-2 ??? Default: all 1's 0-1 Slot 3 IRQ Setup 00 = A-PIRQ2 (Default) 01 = B-PIRQ3 10 = C-PIRQ0 11 = D-PIRQ1 ----------R56-------------------------------- CMOS 56h - AWARD - ??? reserved for PCI Bus Slot 4 Latency Timer ??? ----------R57-------------------------------- CMOS 57h - AWARD - PCI Bus Setup Bitfields for AWARD PCI bus setup: Bit(s) Description (Table C074) 7 PIRQ3# Interrupt Triggering 0 = Edge Sensitive, 1 = Level Sensitive 6-0 ???not used Default: all 1's ----------R58-------------------------------- CMOS 58h - AWARD - ??? reserved for PCI Bus Slot 5 Latency Timer ??? Bitfields for AWARD PCI bus slot 5 latency timer: Bit(s) Description (Table C075) 3 onboard CMD IDE Mode 3 ----------R59-------------------------------- CMOS 59h - AWARD - ??? reserved for PCI Bus Setup ??? ----------R5A-------------------------------- CMOS 5Ah - AWARD - PCI Bus IRQ Setup 1 Bitfields for AWARD PCI bus IRQ setup 1: Bit(s) Description (Table C076) 4-7 PIRQ1# Interrupt Line (0=none, Bh=IRQ11, etc) 0-3 PIRQ0# Interrupt Line " " " ----------R5B-------------------------------- CMOS 5Bh - AWARD - PCI Bus IRQ Setup 2 Bitfields for AWARD PCI bus IRQ setup 2: Bit(s) Description (Table C077) 4-7 PIRQ3# Interrupt Line (0=none, Bh=IRQ11, etc) 0-3 PIRQ2# Interrupt Line " " " ----------R5C-------------------------------- CMOS 5Ch - AMI (PicoPower) - LOW-SPEED CLOCK Bitfields for AMI (PicoPower) low-speed clock select: Bit(s) Description (Table C078) 2-0 low-speed clock divisor 000 /1 001 /2 010 /4 ----------R5C5F------------------------------ CMOS 5Ch-5Fh - AWARD - ??? unused ??? Note: Defaults to all FFh's. ----------R5D-------------------------------- CMOS 5Dh - AMI (PicoPower) - DOZE MODE Bitfields for AMI (PicoPower) doze mode control: Bit(s) Description (Table C079) 7 APM enabled 6-4 doze mode CPU clock speed (see #C080) 3 hotkey setup enabled 2-0 "sleep mode" CPU CLK speed (see #C080) SeeAlso: #C081 (Table C080) Values for AMI (PicoPower) CPU clock speeds: 000 MAX 001 MAX/2 010 MAX/4 011 MAX/8 100 MAX/16 101 MAX/32 110 MAX/64 SeeAlso: #C079,#C081 ----------R5E-------------------------------- CMOS 5Eh - AMI 1990 Hyundai super-NB368S notebook - ??? 00h when values from bios defaults 34h when values from power up defaults ----------R5E5F------------------------------ CMOS 5Eh-5Fh - AMI (PicoPower) - CPU SPEEDS Bitfields for AMI (PicoPower) CPU speeds: Bit(s) Description (Table C081) 7 suspend warning beeps enabled 6-4 "full on" CPU CLK speed 000 MAX 001 MAX/2 010 MAX/4 011 MAX/8 1-0 power management mode 00 disabled 01 Auto 10 enabled SeeAlso: #C079 ----------R5F-------------------------------- CMOS 5Fh - AMI (PicoPower) - POWER MANAGEMENT TIMEOUTS Bitfields for AMI (PicoPower) power management timeouts: Bit(s) Description (Table C082) 7 enable battery-low beeps 5-3 SUSPEND timeout 000 disabled 001 5 minutes 010 10 minutes 011 15 minutes 100 20 minutes 101 30 minutes 110 40 minutes 111 60 minutes 2-0 DOZE timeout 000 disabled 100 1 second 101 4 seconds 110 8 seconds 111 16 seconds SeeAlso: #C084 ----------R60-------------------------------- CMOS 60h - AWARD - POWER MANAGEMENT Bitfields for AWARD power management: Bit(s) Description (Table C083) 7 ??? 6 Video Off Method 1 = V/H SYNC + Blank (default) 0 = Blank Screen 4,5 Video Off Option 00 = Always On (default) 01 = Suspend -> Off 10 = Suspend, Standby -> Off 11 = All Modes -> Off 3 PM Control by APM (1=Yes) 2 ??? 1,0 Power Management Setup 00 User Defined 01 Disabled (default) 10 Minimum Power Savings (40 Minutes for all events) 11 Maximum Power Savings (20 Seconds for all events) ----------R60-------------------------------- CMOS 60h - AMI (PicoPower) - SLEEP TIMEOUT Bitfields for AMI (PicoPower) sleep timeout: Bit(s) Description (Table C084) 5-3 SLEEP timeout 000 disabled 001 1 minute 010 2 minutes 011 3 minutes 100 4 minutes 101 6 minutes 110 8 minutes 111 12 minutes SeeAlso: #C082,#C086 ----------R6077------------------------------ CMOS 60h-77h - AMI WinBIOS - PCI chipset-specific setup information ----------R61-------------------------------- CMOS 61h - AWARD - POWER MANAGEMENT Bitfields for AWARD power management: Bit(s) Description (Table C085) 7 PM Event on HDD Ports Activity (1=enable) 6 PM Event on LPT Port Activity (1=enable) 5 PM Event on COM Port Activity (1=enable) 4 HDD Power Down on Suspend 0-3 HDD Power Down Time 0 Disabled 1-15 Time in Minutes ----------R62-------------------------------- CMOS 62h - AMI 1990 Hyundai super-NB368S notebook - ??? FFh when values from bios defaults FEh when values from power up defaults ----------R62-------------------------------- CMOS 62h - AMI (Neptune) - number of last PCI bus in system SeeAlso: INT 1A/AX=B101h ----------R62-------------------------------- CMOS 62h - AMI (PicoPower) - HARD-DISK POWERDOWN Bitfields for AMI (PicoPower) hard-disk powerdown timeout: Bit(s) Description (Table C086) 3-0 hard-disk timeout in minutes (0000 = disabled) SeeAlso: #C084 ----------R62-------------------------------- CMOS 62h - AWARD - POWER MANAGEMENT Bitfields for AWARD power management: Bit(s) Description (Table C087) 7-4 Standby Mode Setting (for User Defined) 0 Disabled 1 20 Seconds 2 1 Minute 3 5 Minutes 4 10 Minutes 5 15 Minutes 6 20 Minutes 7 30 Minutes 8 40 Minutes 0-3 Doze Mode Setting (for User Defined) (See Standby Mode above) ----------R63-------------------------------- CMOS 63h - AWARD - POWER MANAGEMENT Bitfields for AWARD power management: Bit(s) Description (Table C088) 7 Disable PM Event on IRQ3 Activity (COM2) (1=disable) 6 PM Event on VGA Activity (1=enable) 5 ??? (Defaults to 1) 4 PM Event on PCI/ISA Master Activity (1=enable) 0-3 Suspend Mode Setting (for User Defined) (See Standby Mode above) ----------R63-------------------------------- CMOS 63h - AMI (PicoPower) - BATTERY-LOW ACTIONS Bitfields for AMI (PicoPower) battery-low actions: Bit(s) Description (Table C089) 5-3 battery-very-low action 000 MAX 001 MAX/2 010 MAX/4 011 MAX/8 100 MAX/16 101 MAX/32 110 MAX/64 111 suspend 2-0 battery-low action (same as battery-very-low action) ----------R64-------------------------------- CMOS 64h - AMI 1990 Hyundai super-NB368S notebook - ??? ----------R64-------------------------------- CMOS 64h - AMI (PicoPower) - BATTERY POWER Bitfields for AMI (PicoPower) battery power: Bit(s) Description (Table C090) 6 extended battery debounce enabled 4-3 resume with modem ring 00 disabled 01 one ring 10 two rings 11 three rings 2 365SL power on during suspend 1-0 suspend-mode DRAM refresh cycle 00 15 usec 01 120 usec (1/8 normal) 10 self ----------R64-------------------------------- CMOS 64h - AWARD - POWER MANAGEMENT - IRQ activity events Bitfields for AWARD power management IRQ activity events: Bit(s) Description (Table C091) 7 Disable PM Event on IRQ11 Activity (1=disable) 6 Disable PM Event on IRQ10 Activity (1=disable) 5 Disable PM Event on IRQ9 Activity (IRQ2 Redir) (1=disable) 4 Disable PM Event on IRQ8 Activity (RTC Alarm) (1=disable) 3 Disable PM Event on IRQ7 Activity (LPT1) (1=disable) 2 Disable PM Event on IRQ6 Activity (Floppy) (1=disable) 1 Disable PM Event on IRQ5 Activity (LPT2) (1=disable) 0 Disable PM Event on IRQ4 Activity (COM1) (1=disable) ----------R65-------------------------------- CMOS 65h - AWARD - POWER MANAGEMENT Bitfields for AWARD power management: Bit(s) Description (Table C092) 7-4 ??? may be unused. Defaults to all 1's 3 Disable PM Event on IRQ15 Activity (1=disable) 2 Disable PM Event on IRQ14 Activity (Hard Disk) (1=disable) 1 Disable PM Event on IRQ13 Activity (Coprocessor) (1=disable) 0 Disable PM Event on IRQ12 Activity (PS/2 Mouse) (1=disable) ----------R65-------------------------------- CMOS 65h - AMI (PicoPower) - PC PIN STAGGER Bitfields for AMI (PicoPower) PC pin stagger: Bit(s) Description (Table C093) 7-6 PC pin stagger period 00 immediate 01 4 msec 10 16 msec 11 64 msec ----------R66-------------------------------- CMOS 66h - AMI 1990 Hyundai super-NB368S notebook - DOZE MODE TIMEOUT Note: doze mode timeout 00-0F, from table (0,12 -14 sec) ----------R6679------------------------------ CMOS 66h-79h - AWARD - ??? unused ??? Note: Defaults to all FFh's. ----------R67-------------------------------- CMOS 67h - AMI 1990 Hyundai super-NB368S notebook - SLEEP MODE TIMEOUT Desc: sleep mode timeout 00-0F, units of 1 second ----------R68-------------------------------- CMOS 68h - AMI 1990 Hyundai super-NB368S notebook - SUSPEND MODE TIMEOUT Desc: suspend mode timeout 01-0F, units of 5 minutes ----------R686F------------------------------ CMOS 68h-6Fh - AWARD - IDE hard disk params for first drive on second IDE port ----------R69-------------------------------- CMOS 69h - AMI 1990 Hyundai super-NB368S notebook - LCD MODE TIMEOUT Desc: LCD mode timeout 01-0F, units of 1 minute ----------R6A-------------------------------- CMOS 6Ah - AMI 1990 Hyundai super-NB368S notebook - ??? ----------R7077------------------------------ CMOS 70h-77h - AWARD - IDE hard disk params for second drive on second IDE port ----------R787D------------------------------ CMOS 78h-7Dh - AMI WinBIOS - used by BIOS as scratch RAM ----------R7A-------------------------------- CMOS 7Ah - AWARD - EXTENDED CMOS CHECKSUM (high byte) ----------R7B-------------------------------- CMOS 7Bh - AWARD - EXTENDED CMOS CHECKSUM (low byte) Award's extended checksum is the arithmetic sum of all the bytes from 40h (64 decimal) through 79h (121 decimal). ----------R7E7F------------------------------ CMOS 7Eh-7Fh - AMI WinBIOS - used as scratch RAM by power management code --------!---Admin---------------------------- Highest Table Number = C093 --------!---History-------------------------- Revision History v1.26 Sep, 1995 reformatted (Ralf) v1.25 June 1995 Added AMI WinBIOS info from Daniel Miller (Ralf) v1.24 Jan, 1995 Added Award info from Tim Farley (Ralf) v1.23 June, 1994 Added some MCA info from _The_Undocumented_PC_ v1.22 Feb, 1994 Added NMI mask note v1.21 Jan, 1994 Added note for PS/2 checksum found v1.20 Sept, 1993 PHOENIX data from Wim Osterholt added additional AMI data from Howie (hjh@gwd.dst.gov.au) v1.15 June, 1993 AMSTRAD data updated v1.1 June, 1993 AMSTRAD & PS/2 data added v1.0 June, 1993 First release: Motorola MC 146818, PC-AT & AMI "Hi-Flex" information baselined ---------------------------------------------
