一、接收的配置流程

1.       Global behavior:

设置管脚和工作模式

          Set the receiver pins to operate as McBSP pins

          Enable/disable the digital loopback mode   回环模式

          Enable/disable the clock stop mode 时钟停止模式

          Enable/disable the receive multichannel selection mode 多通道

2.       Data behavior:

          Choose one or two phases for the receive frame 接受帧单段还是双段

          Set the receive word length(s)  接收字长

          Set the receive frame length 

          Enable/disable the receive frame-sync ignore function

          Set the receive companding mode

          Set the receive data delay

          Set the receive sign-extension and justification mode 数据符号扩展和校验

          Set the receive interrupt mode

3.       Frame-sync behavior:

          Set the receive frame-sync mode

          Set the receive frame-sync polarity

          Set the SRG frame-sync period and pulse width

4.       Clock behavior:

          Set the receive clock mode

          Set the receive clock polarity

          Set the SRG clock divide-down value

          Set the SRG clock synchronization mode

          Set the SRG clock mode [choose an input clock]

          Set the SRG input clock polarity

 

 

二、寄存器配置

        接收时需要配置的寄存器： SPCR1, SPCR2, PCR, RCR1, RCR2SRGR1, SRGR2 ,其他的可以设为default

        下面是一个我的调试配置参数，所有时钟和帧同步都由外部提供

/* create a MCBSP config structure for recevie only mode, ignore the send configrue */ /* 外部提供所有时钟 * 单帧 * 每帧8bit * CLK 2.048Mhz * FS 8K * 数据 1Bit延迟 */ // this configuration OK static MCBSP_Config MCBSP_READONLY_Config_test= { MCBSP_SPCR1_RMK( MCBSP_SPCR1_DLB_OFF, //DLB = 0 Digital loopbakc mode diable MCBSP_SPCR1_RJUST_RZF, // RJUST = 0 Right justify the data and zero fill MSBs MCBSP_SPCR1_CLKSTP_DISABLE, //CLKSTP = 0 Clock stop mode disable MCBSP_SPCR1_DXENA_OFF, //DXENA = 0 DX delay enabler off MCBSP_SPCR1_ABIS_DISABLE, //reserbed always write 0 MCBSP_SPCR1_RINTM_RRDY, //RINTM = 00 when the RRDY bit change form 0 to 1,Int mode MCBSP_SPCR1_RSYNCERR_NO, // RSYNCERR = 0 receibe frame-sync error bit, no error MCBSP_SPCR1_RRST_DISABLE //RRST = 0 reset the receiver //注意:: 开始一定要设置为 disable 否则不能设置它的寄存器，全部为默认值 //导致不能正常接收， 在 程序调用C库函数 mcbspstart 时会在设为1 McBSP 便退出reset状态开始工作 ), MCBSP_SPCR2_RMK( MCBSP_SPCR2_FREE_NO, //FREE = 0 MCBSP_SPCR2_SOFT_NO, //SOFT = 0 MCBSP_SPCR2_FRST_RESET, //FRST = 0 SPG reset MCBSP_SPCR2_GRST_RESET, // GRST = 0 SPG reset MCBSP_SPCR2_XINTM_XRDY, //XINTM = 0 transmit interrupt mode, XRDY bit change form 0 to 1 MCBSP_SPCR2_XSYNCERR_NO, //XSYNCER = 0 transmit frame-sync error bit, no error MCBSP_SPCR2_XRST_DISABLE // XRST = 0, reset the transmitter //注意:: 开始一定要设置为 disable 否则不能设置它的寄存器， 全部为默认值 //导致不能正常发送， 在 程序调用C库函数 mcbspstart 时会在设为1 McBSP 便退出reset状态开始工作 ), MCBSP_RCR1_RMK( MCBSP_RCR1_RFRLEN1_OF(0), // RFRLEN1 = 0 receive fram length 1 MCBSP_RCR1_RWDLEN1_8BIT // RWDLEN1 = 0 8bit receive word length 1 ), MCBSP_RCR2_RMK( MCBSP_RCR2_RPHASE_SINGLE, //RPHASE = 0 single-phase frame MCBSP_RCR2_RFRLEN2_OF(0), //RFRLEN2 = 0 MCBSP_RCR2_RWDLEN2_8BIT, //RWDLEN2 = 0 MCBSP_RCR2_RCOMPAND_MSB, //RCOMPAND = 0 receibe companding mode, 0:no companding, MSB received first MCBSP_RCR2_RFIG_NO, //RFIG = 1 frame-sync ignore bit ,1: ignore MCBSP_RCR2_RDATDLY_1BIT //RDATDLY = 01 receive 1-bit data delay ), MCBSP_XCR1_DEFAULT, // MCBSP_XCR2_DEFAULT, // MCBSP_SRGR1_RMK( MCBSP_SRGR1_FWID_OF(0), //FWID = 0 MCBSP_SRGR1_CLKGDV_OF(0) //CLKGDV = 0 ), MCBSP_SRGR2_RMK( MCBSP_SRGR2_GSYNC_FREE, // GSYNC = 0 5502 always write 0 MCBSP_SRGR2_CLKSP_RISING, //CLKSP = 0 5502 don't have the CLKS pin set 0 always rsing edge igern the CLKRP and CLKXP MCBSP_SRGR2_CLKSM_CLKS, //CLKSM = 0 work with the CLKME bit inPCR /* SCLKME CLKSM Sample Rate Generator 0 0 Signal on CLKS pin 注意5501没有CLKS pin 1 0 Signal on CLKR pin 0 1 McBSP internal input clock （low外设的时钟--SYSCLK3） 1 1 Signal on CLKX pin */ MCBSP_SRGR2_FSGM_DXR2XSR, //FSGM = 0 MCBSP_SRGR2_FPER_OF(0) // FPER = 0 ), MCBSP_MCR1_DEFAULT, MCBSP_MCR2_DEFAULT, MCBSP_PCR_RMK( MCBSP_PCR_XIOEN_SP, //XIOEN = 0 MCBSP_PCR_RIOEN_SP, //RIOEN = 0 MCBSP_PCR_FSXM_EXTERNAL, //FSXM = 0 MCBSP_PCR_FSRM_EXTERNAL, //FSRM = 0 MCBSP_PCR_CLKXM_INPUT, //CLKXM = 0 MCBSP_PCR_CLKRM_INPUT, //CLKRM = 0 MCBSP_PCR_SCLKME_BCLK, //SCLKME = 1 MCBSP_PCR_DXSTAT_0, //DXSTAT = 0 , used noly the RIOEN bit = 1 MCBSP_PCR_FSXP_ACTIVEHIGH, //FSXP = 0 MCBSP_PCR_FSRP_ACTIVEHIGH, // FSRP = 0 MCBSP_PCR_CLKXP_RISING, //CLKXP = 0 MCBSP_PCR_CLKRP_FALLING //CLKRP = 0 ), MCBSP_RCERA_DEFAULT, MCBSP_RCERB_DEFAULT, MCBSP_RCERC_DEFAULT, MCBSP_RCERD_DEFAULT, MCBSP_RCERE_DEFAULT, MCBSP_RCERF_DEFAULT, MCBSP_RCERG_DEFAULT, MCBSP_RCERH_DEFAULT, MCBSP_XCERA_DEFAULT, MCBSP_XCERB_DEFAULT, MCBSP_XCERC_DEFAULT, MCBSP_XCERD_DEFAULT, MCBSP_XCERE_DEFAULT, MCBSP_XCERF_DEFAULT, MCBSP_XCERG_DEFAULT, MCBSP_XCERH_DEFAULT };

 

注意的几点：

1.  在configure是 RRST 和 XRST 一定要设置为Disable，才可以正确的配置他的各个寄存器

2. 5502 不支持 CLKG的同步  SRGR2中的 GSYNC bit 始终写为 0

使用时如下步骤：

 

IRQ_globalDisable();

hMcbsp = MCBSP_open(MCBSP_PORT1, MCBSP_OPEN_RESET);

rcvEventID = MCBSP_getRcvEventId(hMcbsp);

IRQ_setVecs((Uint32)(&VECSTART));

IRQ_clear(rcvEventID);

IRQ_plug(rcvEventID, &readISR);

MCBSP_config(hMcbsp, &MCBSP_READONLY_Config_ _test);

IRQ_enable(rcvEventID);

/* Start Sample Rate Generator and Frame Sync */

MCBSP_start(hMcbsp,MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC,0x300);  //如果需要

/* Enable MCBSP transmit and receive */

MCBSP_start(hMcbsp,  MCBSP_RCV_START ,  0);

IRQ_globalEnable();

 

 

 

三、测试例程

 

下面是我的一个测试程序，可以正确接受数据：

 

/* * Copyright (C) 2010 2202Lab tiany * All Rights Reserved */ /* *---------mcbsp_test.c--------- * McBSP receive and send example */ #include <stdio.h> #include <csl.h> #include <csl_mcbsp.h> #include <csl_irq.h> //---------Global constants--------- #define SIZE 1024 //---------Global data definition--------- //Handle for McBSP static volatile MCBSP_Handle hMcbsp; //Buffers to store data static volatile Uint16 writeBuff[SIZE], readBuff[SIZE]; Uint16 rcvEventID; Uint16 cnt=0; /* create a MCBSP config structure for recevie only mode, ignore the send configrue */ /* 外部提供所有时钟 * 单帧 * 每帧8bit * CLK 2.048Mhz * FS 8K * 数据 1Bit延迟 */ // this configuration OK static MCBSP_Config MCBSP_READONLY_Config_test= { MCBSP_SPCR1_RMK( MCBSP_SPCR1_DLB_OFF, //DLB = 0 Digital loopbakc mode diable MCBSP_SPCR1_RJUST_RZF, // RJUST = 0 Right justify the data and zero fill MSBs MCBSP_SPCR1_CLKSTP_DISABLE, //CLKSTP = 0 Clock stop mode disable MCBSP_SPCR1_DXENA_OFF, //DXENA = 0 DX delay enabler off MCBSP_SPCR1_ABIS_DISABLE, //reserbed always write 0 MCBSP_SPCR1_RINTM_RRDY, //RINTM = 00 when the RRDY bit change form 0 to 1,Int mode MCBSP_SPCR1_RSYNCERR_NO, // RSYNCERR = 0 receibe frame-sync error bit, no error MCBSP_SPCR1_RRST_DISABLE //RRST = 0 reset the receiver //注意 开始一定要设置为 disable 否则不能设置它的寄存器，导致不能正常工作， 在 mcbspstart时会在设为1 McBSP 便开始工作 ), MCBSP_SPCR2_RMK( MCBSP_SPCR2_FREE_NO, //FREE = 0 MCBSP_SPCR2_SOFT_NO, //SOFT = 0 MCBSP_SPCR2_FRST_RESET, //FRST = 0 SPG reset MCBSP_SPCR2_GRST_RESET, // GRST = 0 SPG reset MCBSP_SPCR2_XINTM_XRDY, //XINTM = 0 transmit interrupt mode, XRDY bit change form 0 to 1 MCBSP_SPCR2_XSYNCERR_NO, //XSYNCER = 0 transmit frame-sync error bit, no error MCBSP_SPCR2_XRST_DISABLE // XRST = 0, reset the transmitter ), MCBSP_RCR1_RMK( MCBSP_RCR1_RFRLEN1_OF(0), // RFRLEN1 = 0 receive fram length 1 MCBSP_RCR1_RWDLEN1_8BIT // RWDLEN1 = 0 8bit receive word length 1 ), MCBSP_RCR2_RMK( MCBSP_RCR2_RPHASE_SINGLE, //RPHASE = 0 single-phase frame MCBSP_RCR2_RFRLEN2_OF(0), //RFRLEN2 = 0 MCBSP_RCR2_RWDLEN2_8BIT, //RWDLEN2 = 0 MCBSP_RCR2_RCOMPAND_MSB, //RCOMPAND = 0 receibe companding mode, 0:no companding, MSB received first MCBSP_RCR2_RFIG_NO, //RFIG = 1 frame-sync ignore bit ,1: ignore MCBSP_RCR2_RDATDLY_1BIT //RDATDLY = 01 receive 1-bit data delay ), MCBSP_XCR1_DEFAULT, // MCBSP_XCR2_DEFAULT, // MCBSP_SRGR1_RMK( MCBSP_SRGR1_FWID_OF(0), //FWID = 0 MCBSP_SRGR1_CLKGDV_OF(0) //CLKGDV = 0 ), MCBSP_SRGR2_RMK( MCBSP_SRGR2_GSYNC_FREE, // GSYNC = 0 5502 always write 0 MCBSP_SRGR2_CLKSP_RISING, //CLKSP = 0 5502 don't have the CLKS pin set 0 always rsing edge igern the CLKRP and CLKXP MCBSP_SRGR2_CLKSM_CLKS, //CLKSM = 0 work with the CLKME bit inPCR /* SCLKME CLKSM Sample Rate Generator 0 0 Signal on CLKS pin 1 0 Signal on CLKR pin 0 1 McBSP internal input clock 1 1 Signal on CLKX pin */ MCBSP_SRGR2_FSGM_DXR2XSR, //FSGM = 0 MCBSP_SRGR2_FPER_OF(0) // FPER = 0 ), MCBSP_MCR1_DEFAULT, MCBSP_MCR2_DEFAULT, MCBSP_PCR_RMK( MCBSP_PCR_XIOEN_SP, //XIOEN = 0 MCBSP_PCR_RIOEN_SP, //RIOEN = 0 MCBSP_PCR_FSXM_EXTERNAL, //FSXM = 0 MCBSP_PCR_FSRM_EXTERNAL, //FSRM = 0 MCBSP_PCR_CLKXM_INPUT, //CLKXM = 0 MCBSP_PCR_CLKRM_INPUT, //CLKRM = 0 MCBSP_PCR_SCLKME_BCLK, //SCLKME = 1 MCBSP_PCR_DXSTAT_0, //DXSTAT = 0 , used noly the RIOEN bit = 1 MCBSP_PCR_FSXP_ACTIVEHIGH, //FSXP = 0 MCBSP_PCR_FSRP_ACTIVEHIGH, // FSRP = 0 MCBSP_PCR_CLKXP_RISING, //CLKXP = 0 MCBSP_PCR_CLKRP_FALLING //CLKRP = 0 ), MCBSP_RCERA_DEFAULT, MCBSP_RCERB_DEFAULT, MCBSP_RCERC_DEFAULT, MCBSP_RCERD_DEFAULT, MCBSP_RCERE_DEFAULT, MCBSP_RCERF_DEFAULT, MCBSP_RCERG_DEFAULT, MCBSP_RCERH_DEFAULT, MCBSP_XCERA_DEFAULT, MCBSP_XCERB_DEFAULT, MCBSP_XCERC_DEFAULT, MCBSP_XCERD_DEFAULT, MCBSP_XCERE_DEFAULT, MCBSP_XCERF_DEFAULT, MCBSP_XCERG_DEFAULT, MCBSP_XCERH_DEFAULT }; interrupt void readISR(void); extern void VECSTART(void);//外部中断向量表 //使用的TI例程 没有改动 在/CCStudio_v3.3/examples/c5502/csl/mcbsp/mcbsp2目录下的vectors_mcbsp2.s55 //---------main routine--------- void main() { Uint16 i; for (i = 0; i <= SIZE - 1; i++) { readBuff[i] = 0x00; } CSL_init(); //Disable interrupt IRQ_globalDisable(); //Open McBSP channel hMcbsp = MCBSP_open(MCBSP_PORT1, MCBSP_OPEN_RESET); /* Get EventId's associated with MCBSP Port 1 receive and transmit */ rcvEventID = MCBSP_getRcvEventId(hMcbsp); IRQ_setVecs((Uint32)(&VECSTART)); /* Clear any pending receive or transmit interrupts */ IRQ_clear(rcvEventID); IRQ_plug(rcvEventID, &readISR); /* Write values from configuration structure to MCBSP control regs */ MCBSP_config(hMcbsp, &MCBSP_READONLY_Config_test); /* Enable the MCBSP receive and transmit interrupts */ IRQ_enable(rcvEventID); /* Enable MCBSP transmit and receive */ MCBSP_start(hMcbsp, MCBSP_RCV_START , 0); IRQ_globalEnable(); while(1); } // ISR to receive data interrupt void readISR(void) { readBuff[cnt] = MCBSP_read16(hMcbsp); cnt++; if (cnt == SIZE) { cnt = 0; } }